<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/arm/mach-berlin, branch v4.1</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>ARM: berlin: do not select RESET_CONTROLLER</title>
<updated>2014-11-18T19:27:53+00:00</updated>
<author>
<name>Antoine Tenart</name>
<email>antoine.tenart@free-electrons.com</email>
</author>
<published>2014-11-17T13:33:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=81906906d8d95837c87b934a1a929cc43b61f4ee'/>
<id>81906906d8d95837c87b934a1a929cc43b61f4ee</id>
<content type='text'>
RESET_CONTROLLER is meant to be user-selectable. To respect that,
do not select it automatically when using ARCH_BERLIN.

Signed-off-by: Antoine Tenart &lt;antoine.tenart@free-electrons.com&gt;
Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
RESET_CONTROLLER is meant to be user-selectable. To respect that,
do not select it automatically when using ARCH_BERLIN.

Signed-off-by: Antoine Tenart &lt;antoine.tenart@free-electrons.com&gt;
Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: Berlin: select the reset controller</title>
<updated>2014-10-21T09:35:15+00:00</updated>
<author>
<name>Antoine Ténart</name>
<email>antoine.tenart@free-electrons.com</email>
</author>
<published>2014-09-03T07:48:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e9246c8726312aae36202b9e50c7e76a8609b712'/>
<id>e9246c8726312aae36202b9e50c7e76a8609b712</id>
<content type='text'>
The Marvell Berlin SoCs now has a reset controller. Add the needed
configuration. While at it reorder Kconfigs alphabetically.

Signed-off-by: Antoine Ténart &lt;antoine.tenart@free-electrons.com&gt;
Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Marvell Berlin SoCs now has a reset controller. Add the needed
configuration. While at it reorder Kconfigs alphabetically.

Signed-off-by: Antoine Ténart &lt;antoine.tenart@free-electrons.com&gt;
Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'berlin-soc-3.17-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/soc</title>
<updated>2014-07-08T05:42:24+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2014-07-08T05:41:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3ae22f4d94e5b69b8d9b8b1ce2702043e4aca43d'/>
<id>3ae22f4d94e5b69b8d9b8b1ce2702043e4aca43d</id>
<content type='text'>
Merge "Berlin SoC changes for v3.17" from Sebastian Hesselbarth:

- SMP support for BG2 and BG2Q

* tag 'berlin-soc-3.17-1' of git://git.infradead.org/users/hesselba/linux-berlin:
  ARM: berlin: add SMP support

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Merge "Berlin SoC changes for v3.17" from Sebastian Hesselbarth:

- SMP support for BG2 and BG2Q

* tag 'berlin-soc-3.17-1' of git://git.infradead.org/users/hesselba/linux-berlin:
  ARM: berlin: add SMP support

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: use menuconfig for sub-arch menus</title>
<updated>2014-06-17T15:09:48+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2014-06-10T14:06:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=21278aeafbfacfd62b3e613525f0c694a029dac1'/>
<id>21278aeafbfacfd62b3e613525f0c694a029dac1</id>
<content type='text'>
The System Type menu is getting quite long with platforms and is
inconsistent in handling of sub-arch specific options. Tidy up the menu
by making platform options a menuconfig entry containing any platform
specific config items.

[arnd: change OMAP part according to suggestion from
 Tony Lindgren &lt;tony@atomide.com&gt;]

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The System Type menu is getting quite long with platforms and is
inconsistent in handling of sub-arch specific options. Tidy up the menu
by making platform options a menuconfig entry containing any platform
specific config items.

[arnd: change OMAP part according to suggestion from
 Tony Lindgren &lt;tony@atomide.com&gt;]

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: berlin: add SMP support</title>
<updated>2014-06-16T11:16:44+00:00</updated>
<author>
<name>Antoine Ténart</name>
<email>antoine.tenart@free-electrons.com</email>
</author>
<published>2014-06-04T16:03:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7b7dfdd2b9927c1861bb6d03ca35261f1739aceb'/>
<id>7b7dfdd2b9927c1861bb6d03ca35261f1739aceb</id>
<content type='text'>
Adds SMP support for Berlin SoCs. Secondary CPUs are reset, then
execute the instruction we put in the reset exception register, setting
the pc at the address contained in the software reset address register,
which is the physical address of the Berlin secondary startup.

This implementation avoid using the pen lock mechanism.

Signed-off-by: Antoine Ténart &lt;antoine.tenart@free-electrons.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Adds SMP support for Berlin SoCs. Secondary CPUs are reset, then
execute the instruction we put in the reset exception register, setting
the pc at the address contained in the software reset address register,
which is the physical address of the Berlin secondary startup.

This implementation avoid using the pen lock mechanism.

Signed-off-by: Antoine Ténart &lt;antoine.tenart@free-electrons.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into next</title>
<updated>2014-06-05T22:57:04+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-06-05T22:57:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=eb3d3ec567e868c8a3bfbfdfc9465ffd52983d11'/>
<id>eb3d3ec567e868c8a3bfbfdfc9465ffd52983d11</id>
<content type='text'>
Pull ARM updates from Russell King:

 - Major clean-up of the L2 cache support code.  The existing mess was
   becoming rather unmaintainable through all the additions that others
   have done over time.  This turns it into a much nicer structure, and
   implements a few performance improvements as well.

 - Clean up some of the CP15 control register tweaks for alignment
   support, moving some code and data into alignment.c

 - DMA properties for ARM, from Santosh and reviewed by DT people.  This
   adds DT properties to specify bus translations we can't discover
   automatically, and to indicate whether devices are coherent.

 - Hibernation support for ARM

 - Make ftrace work with read-only text in modules

 - add suspend support for PJ4B CPUs

 - rework interrupt masking for undefined instruction handling, which
   allows us to enable interrupts earlier in the handling of these
   exceptions.

 - support for big endian page tables

 - fix stacktrace support to exclude stacktrace functions from the
   trace, and add save_stack_trace_regs() implementation so that kprobes
   can record stack traces.

 - Add support for the Cortex-A17 CPU.

 - Remove last vestiges of ARM710 support.

 - Removal of ARM "meminfo" structure, finally converting us solely to
   memblock to handle the early memory initialisation.

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits)
  ARM: ensure C page table setup code follows assembly code (part II)
  ARM: ensure C page table setup code follows assembly code
  ARM: consolidate last remaining open-coded alignment trap enable
  ARM: remove global cr_no_alignment
  ARM: remove CPU_CP15 conditional from alignment.c
  ARM: remove unused adjust_cr() function
  ARM: move "noalign" command line option to alignment.c
  ARM: provide common method to clear bits in CPU control register
  ARM: 8025/1: Get rid of meminfo
  ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type
  ARM: 8066/1: correction for ARM patch 8031/2
  ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation
  ARM: 8065/1: remove last use of CONFIG_CPU_ARM710
  ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction
  ARM: 8047/1: rwsem: use asm-generic rwsem implementation
  ARM: l2c: trial at enabling some Cortex-A9 optimisations
  ARM: l2c: add warnings for stuff modifying aux_ctrl register values
  ARM: l2c: print a warning with L2C-310 caches if the cache size is modified
  ARM: l2c: remove old .set_debug method
  ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM updates from Russell King:

 - Major clean-up of the L2 cache support code.  The existing mess was
   becoming rather unmaintainable through all the additions that others
   have done over time.  This turns it into a much nicer structure, and
   implements a few performance improvements as well.

 - Clean up some of the CP15 control register tweaks for alignment
   support, moving some code and data into alignment.c

 - DMA properties for ARM, from Santosh and reviewed by DT people.  This
   adds DT properties to specify bus translations we can't discover
   automatically, and to indicate whether devices are coherent.

 - Hibernation support for ARM

 - Make ftrace work with read-only text in modules

 - add suspend support for PJ4B CPUs

 - rework interrupt masking for undefined instruction handling, which
   allows us to enable interrupts earlier in the handling of these
   exceptions.

 - support for big endian page tables

 - fix stacktrace support to exclude stacktrace functions from the
   trace, and add save_stack_trace_regs() implementation so that kprobes
   can record stack traces.

 - Add support for the Cortex-A17 CPU.

 - Remove last vestiges of ARM710 support.

 - Removal of ARM "meminfo" structure, finally converting us solely to
   memblock to handle the early memory initialisation.

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits)
  ARM: ensure C page table setup code follows assembly code (part II)
  ARM: ensure C page table setup code follows assembly code
  ARM: consolidate last remaining open-coded alignment trap enable
  ARM: remove global cr_no_alignment
  ARM: remove CPU_CP15 conditional from alignment.c
  ARM: remove unused adjust_cr() function
  ARM: move "noalign" command line option to alignment.c
  ARM: provide common method to clear bits in CPU control register
  ARM: 8025/1: Get rid of meminfo
  ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type
  ARM: 8066/1: correction for ARM patch 8031/2
  ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation
  ARM: 8065/1: remove last use of CONFIG_CPU_ARM710
  ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction
  ARM: 8047/1: rwsem: use asm-generic rwsem implementation
  ARM: l2c: trial at enabling some Cortex-A9 optimisations
  ARM: l2c: add warnings for stuff modifying aux_ctrl register values
  ARM: l2c: print a warning with L2C-310 caches if the cache size is modified
  ARM: l2c: remove old .set_debug method
  ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: l2c: berlin: convert to generic l2c OF initialisation</title>
<updated>2014-05-29T23:49:06+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-04-28T14:57:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a048711c0b3701ee22efd74022cb1f548a52842c'/>
<id>a048711c0b3701ee22efd74022cb1f548a52842c</id>
<content type='text'>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.  We can remove the explicit machine init too
as this becomes identical to the generic version.

Acked-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.  We can remove the explicit machine init too
as this becomes identical to the generic version.

Acked-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: l2c: remove platforms/SoCs setting early BRESP</title>
<updated>2014-05-29T23:48:51+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-03-19T12:44:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=36bccb11a4ac7cc9d190c3062945f1c911a62801'/>
<id>36bccb11a4ac7cc9d190c3062945f1c911a62801</id>
<content type='text'>
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly.  Instead, they should seek to preserve the value of bit 30
in the auxiliary control register.

Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly.  Instead, they should seek to preserve the value of bit 30
in the auxiliary control register.

Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: berlin: add the pinctrl dependency for the Marvell Berlin SoCs</title>
<updated>2014-05-19T20:52:39+00:00</updated>
<author>
<name>Antoine Tenart</name>
<email>antoine.tenart@free-electrons.com</email>
</author>
<published>2014-05-18T18:06:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=03dac26a831c51e544dc95ba12ea9e3520829e7e'/>
<id>03dac26a831c51e544dc95ba12ea9e3520829e7e</id>
<content type='text'>
Signed-off-by: Antoine Tenart &lt;antoine.tenart@free-electrons.com&gt;
Acked-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Antoine Tenart &lt;antoine.tenart@free-electrons.com&gt;
Acked-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: berlin: add the LIBGPIO as a dependency for the BG2Q</title>
<updated>2014-05-19T20:52:28+00:00</updated>
<author>
<name>Antoine Tenart</name>
<email>antoine.tenart@free-electrons.com</email>
</author>
<published>2014-04-16T07:46:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d45fa871c06762ab7e10ea4d889ab5be61d41ab1'/>
<id>d45fa871c06762ab7e10ea4d889ab5be61d41ab1</id>
<content type='text'>
The BG2Q has GPIOs driven by the dwapb GPIO driver. Add the LIBGPIO as a
dependency to be able to support them.

Signed-off-by: Antoine Tenart &lt;antoine.tenart@free-electrons.com&gt;
Reviewed-by: Jisheng Zhang &lt;jszhang@marvell.com&gt;
Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The BG2Q has GPIOs driven by the dwapb GPIO driver. Add the LIBGPIO as a
dependency to be able to support them.

Signed-off-by: Antoine Tenart &lt;antoine.tenart@free-electrons.com&gt;
Reviewed-by: Jisheng Zhang &lt;jszhang@marvell.com&gt;
Signed-off-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
