Pull ARM SoC platform changes from Olof Johansson:
 "New and updated SoC support.  Among the things new for this release
  are:

   - More support for the AM33xx platforms from TI
   - Tegra 124 support, and some updates to older tegra families as well
   - imx cleanups and updates across the board
   - A rename of Broadcom's Mobile platforms which were introduced as
     ARCH_BCM, and turned out to be too broad a name.  New name is
     ARCH_BCM_MOBILE.
   - A whole bunch of updates and fixes for integrator, making the
     platform code more modern and switches over to DT-only booting.
   - Support for two new Renesas shmobile chipsets.  Next up for them is
     more work on consolidation instead of introduction of new
     non-multiplatform SoCs, we're all looking forward to that!
   - Misc cleanups for older Samsung platforms, some Allwinner updates,
     etc"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (159 commits)
  ARM: bcm281xx: Add ARCH_BCM_MOBILE to bcm config
  ARM: bcm_defconfig: Run "make savedefconfig"
  ARM: bcm281xx: Add ARCH Timers to config
  rename ARCH_BCM to ARCH_BCM_MOBILE (mach-bcm)
  ARM: vexpress: Enable platform-specific options in defconfig
  ARM: vexpress: Make defconfig work again
  ARM: sunxi: remove .init_time hooks
  ARM: imx: enable suspend for imx6sl
  ARM: imx: ensure dsm_request signal is not asserted when setting LPM
  ARM: imx6q: call WB and RBC configuration from imx6q_pm_enter()
  ARM: imx6q: move low-power code out of clock driver
  ARM: imx: drop extern with function prototypes in common.h
  ARM: imx: reset core along with enable/disable operation
  ARM: imx: do not return from imx_cpu_die() call
  ARM: imx_v6_v7_defconfig: Select CONFIG_PROVE_LOCKING
  ARM: imx_v6_v7_defconfig: Enable LEDS_GPIO related options
  ARM: mxs_defconfig: Turn off CONFIG_DEBUG_GPIO
  ARM: imx: replace imx6q_restart() with mxc_restart()
  ARM: mach-imx: mm-imx5: Retrieve iomuxc base address from dt
  ARM: mach-imx: mm-imx5: Retrieve tzic base address from dt
  ...

Pull ARM SoC low-priority fixes from Olof Johansson:
 "A set of fixes for various platforms that weren't considered bad
  enough to include in 3.12 (nor -stable).  Mostly simple typo fixes,
  etc"

* tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: OMAP2+: irq, AM33XX add missing register check
  ARM: OMAP2+: wakeupgen: AM43x adaptation
  ARM: OMAP1: Fix a bunch of GPIO related section warnings after initdata got corrected
  ARM: dts: fix PL330 MDMA1 address in DT for Universal C210 board
  ARM: dts: Work around lack of cpufreq regulator lookup for exynos4210-origen and trats boards
  ARM: dts: Fix typo earlyprintk in exynos5440-sd5v1 and ssdk5440 boards
  ARM: dts: Correct typo in use of samsung,pin-drv for exynos5250
  ARM: rockchip: remove obsolete rockchip,config properties
  ARM: rockchip: fix wrong use of non-existent CONFIG_LOCAL_TIMERS
  ARM: mach-omap1: Fix omap1510_fpga_init_irq() implicit declarations.
  ARM: OMAP1: fix incorrect placement of __initdata tag
  ARM: OMAP: remove deprecated IRQF_DISABLED
  ARM: OMAP2+: throw the die id into the entropy pool

Otherwise we can get an error with some configs:

arch/arm/mach-omap2/timer.c:73: undefined reference to `omap_smc1'

Signed-off-by: Tony Lindgren <tony@atomide.com>

The realtime counter called master counter, produces the count
used by the private timer peripherals in the MPU_CLUSTER. The
CNTFRQ per cpu register is used to denote the frequency of the counter.
Currently the frequency value is passed from the
DT file, but this is not scalable when we have other non-DT guest
OS. This register must be set to the right value by the
secure rom code. Setting this register helps in propagating the right
frequency value across OSes.

More discussions and the reason for adding this in a non-DT
way can be seen from below.
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg93832.html

So configuring this secure register for all the cpus here.

Cc: Nishanth Menon <nm@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

The real time counter also called master counter, is a free-running
counter. It produces the count used by the CPU local timer peripherals
in the MPU cluster. The timer counts at a rate of 6.144 MHz.

The ratio registers are missing for a sys-clk of 20MHZ which is used
by DRA7 socs. So because of this, the counter was getting wrongly
programmed for a sys-clk of 38.4Mhz(default). So adding the ratio
registers for 20MHZ sys-clk.

Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Since dra7 reuses the  function 'omap5_realtime_timer_init' in
arch/arm/mach-omap2/board-generic.c as timer init function, it has to be
built for this SoC as well.

Signed-off-by: Simon Barth <Simon.Pe.Barth@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

This patch proposes to remove the IRQF_DISABLED flag from OMAP code
It's a NOOP since 2.6.35, and will be removed one day.

Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Pull ARM SoC platform changes from Olof Johansson:
 "This branch contains mostly additions and changes to platform
  enablement and SoC-level drivers.  Since there's sometimes a
  dependency on device-tree changes, there's also a fair amount of
  those in this branch.

  Pieces worth mentioning are:

   - Mbus driver for Marvell platforms, allowing kernel configuration
     and resource allocation of on-chip peripherals.
   - Enablement of the mbus infrastructure from Marvell PCI-e drivers.
   - Preparation of MSI support for Marvell platforms.
   - Addition of new PCI-e host controller driver for Tegra platforms
   - Some churn caused by sharing of macro names between i.MX 6Q and 6DL
     platforms in the device tree sources and header files.
   - Various suspend/PM updates for Tegra, including LP1 support.
   - Versatile Express support for MCPM, part of big little support.
   - Allwinner platform support for A20 and A31 SoCs (dual and quad
     Cortex-A7)
   - OMAP2+ support for DRA7, a new Cortex-A15-based SoC.

  The code that touches other architectures are patches moving MSI
  arch-specific functions over to weak symbols and removal of
  ARCH_SUPPORTS_MSI, acked by PCI maintainers"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (266 commits)
  tegra-cpuidle: provide stub when !CONFIG_CPU_IDLE
  PCI: tegra: replace devm_request_and_ioremap by devm_ioremap_resource
  ARM: tegra: Drop ARCH_SUPPORTS_MSI and sort list
  ARM: dts: vf610-twr: enable i2c0 device
  ARM: dts: i.MX51: Add one more I2C2 pinmux entry
  ARM: dts: i.MX51: Move pins configuration under "iomuxc" label
  ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog
  ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator
  ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX
  ARM: dts: i.MX27: Disable AUDMUX in the template
  ARM: dts: wandboard: Add support for SDIO bcm4329
  ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template
  ARM: dts: imx53-qsb: Make USBH1 functional
  ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module
  ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module
  ARM: dts: imx6qdl-sabresd: Add touchscreen support
  ARM: imx: add ocram clock for imx53
  ARM: dts: imx: ocram size is different between imx6q and imx6dl
  ARM: dts: imx27-phytec-phycore-som: Fix regulator settings
  ARM: dts: i.MX27: Remove clock name from CPU node
  ...

Pull ARM SoC cleanups from Olof Johansson:
 "This branch contains code cleanups, moves and removals for 3.12.

  There's a large number of various cleanups, and a nice net removal of
  13500 lines of code.

  Highlights worth mentioning are:

   - A series of patches from Stephen Boyd removing the ARM local timer
     API.
   - Move of Qualcomm MSM IOMMU code to drivers/iommu.
   - Samsung PWM driver cleanups from Tomasz Figa, removing legacy PWM
     driver and switching over to the drivers/pwm one.
   - Removal of some unusued auto-generated headers for OMAP2+ (PRM/CM).

  There's also a move of a header file out of include/linux/i2c/ to
  platform_data, where it really belongs.  It touches mostly ARM
  platform code for include changes so we took it through our tree"

* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: OMAP2+: Add back the define for AM33XX_RST_GLOBAL_WARM_SW_MASK
  gpio: (gpio-pca953x) move header to linux/platform_data/
  arm: zynq: hotplug: Remove unreachable code
  ARM: SAMSUNG: Remove unnecessary exynos4_default_sdhci*()
  tegra: simplify use of devm_ioremap_resource
  ARM: SAMSUNG: Remove plat/regs-timer.h header
  ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
  ARM: SAMSUNG: Remove pwm-clock infrastructure
  ARM: SAMSUNG: Remove old PWM timer platform devices
  pwm: Remove superseded pwm-samsung-legacy driver
  ARM: SAMSUNG: Modify board files to use new PWM platform device
  ARM: SAMSUNG: Rework private data handling in dev-backlight
  pwm: Add new pwm-samsung driver
  ARM: mach-mvebu: remove redundant DT parsing and validation
  ARM: msm: Only compile io.c on platforms that use it
  iommu/msm: Move mach includes to iommu directory
  ARM: msm: Remove devices-iommu.c
  ARM: msm: Move mach/board.h contents to common.h
  ARM: msm: Migrate msm_timer to CLOCKSOURCE_OF_DECLARE
  ARM: msm: Remove TMR and TMR0 static mappings
  ...

The denominator should be load from INCREMENTOR_DENUMERATOR_RELOAD_OFFSET
rather than INCREMENTER_NUMERATOR_OFFSET.

This is more likely a typo, since INCREMENTER_DENUMERATOR_RELOAD[23:17] is
reserved. It seems that it won't make much trouble without this fix, because
the useful [11:0] bits are mask and set the right value. Anyway, reading
from a right address is better choice.

Signed-off-by: Chen Baozi <baozich@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>