linux-toradex.git/arch/arm/mach-prima2/timer.c, branch v3.4.9

ARM: prima2: convert to common sched_clock() implementation

2012-02-03T11:34:26+00:00

Prima2 has its own sched_clock() implementation, which gets in the
way of a single zImage. Moving to the common sched_clock framework
makes the code slightly cleaner (the mapping hack in sched_clock()
goes away...).

Acked-by: Barry Song 
Signed-off-by: Marc Zyngier

Merge branch 'next/pm' of git://git.linaro.org/people/arnd/arm-soc

2011-11-02T03:22:01+00:00

* 'next/pm' of git://git.linaro.org/people/arnd/arm-soc: (66 commits)
  ARM: CSR: PM: use outer_resume to resume L2 cache
  ARM: CSR: call l2x0_of_init to init L2 cache of SiRFprimaII
  ARM: OMAP: voltage: voltage layer present, even when CONFIG_PM=n
  ARM: CSR: PM: add sleep entry for SiRFprimaII
  ARM: CSR: PM: save/restore irq status in suspend cycle
  ARM: CSR: PM: save/restore timer status in suspend cycle
  OMAP4: PM: TWL6030: add cmd register
  OMAP4: PM: TWL6030: fix ON/RET/OFF voltages
  OMAP4: PM: TWL6030: address 0V conversions
  OMAP4: PM: TWL6030: fix uv to voltage for >0x39
  OMAP4: PM: TWL6030: fix voltage conversion formula
  omap: voltage: add a stub header file for external/regulator use
  OMAP2+: VC: more registers are per-channel starting with OMAP5
  OMAP3+: voltage: update nominal voltage in voltdm_scale() not VC post-scale
  OMAP3+: voltage: rename omap_voltage_get_nom_volt -> voltdm_get_voltage
  OMAP3+: voltdm: final removal of omap_vdd_info
  OMAP3+: voltage: move/rename curr_volt from vdd_info into struct voltagedomain
  OMAP3+: voltage: rename scale and reset functions using voltdm_ prefix
  OMAP3+: VP: combine setting init voltage into common function
  OMAP3+: VP: remove unused omap_vp_get_curr_volt()
  ...

Fix up trivial conflict in arch/arm/mach-prima2/l2x0.c (code removal vs
edit)

ARM: CSR: timer: space required before the open parenthesis '('

2011-10-01T01:39:21+00:00

Signed-off-by: Barry Song

ARM: CSR: timer: do not initialise statics to 0 or NULL

2011-10-01T01:38:39+00:00

Signed-off-by: Barry Song

ARM: CSR: PM: save/restore timer status in suspend cycle

2011-09-21T14:50:08+00:00

SiRFprimaII will lose power in deepsleep mode except rtc, pmu and sdram
self-refresh.
This patch saves timer-related registers while suspending and restore
them while resuming.

Signed-off-by: Barry Song 
Acked-by: Arnd Bergmann

ARM: CSR: add missing sentinels to of_device_id tables

2011-09-11T01:11:26+00:00

The of_device_id tables used for matching should be terminated with
empty sentinel values.

Signed-off-by: Jamie Iles 
Signed-off-by: Barry Song

ARM: CSR: Adding CSR SiRFprimaII board support

2011-07-08T23:19:28+00:00

SiRFprimaII is the latest generation application processor from CSR’s
Multifunction SoC product family. Designed around an ARM cortex A9 core,
high-speed memory bus, advanced 3D accelerator and full-HD multi-format
video decoder, SiRFprimaII is able to meet the needs of complicated
applications for modern multifunction devices that require heavy concurrent
applications and fluid user experience. Integrated with GPS baseband,
analog and PMU, this new platform is designed to provide a cost effective
solution for Automotive and Consumer markets.

This patch adds the basic support for this SoC and EVB board based on device
tree. It is following the ZYNQ of Xilinx in some degree.

Signed-off-by: Binghua Duan 
Signed-off-by: Rongjun Ying 
Signed-off-by: Zhiwu Song 
Signed-off-by: Yuping Luo 
Signed-off-by: Bin Shi 
Signed-off-by: Huayi Li 
Signed-off-by: Barry Song 
Reviewed-by: Arnd Bergmann