<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/arm/mach-prima2, branch v4.4.151</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>ARM: prima2: always enable reset controller</title>
<updated>2016-05-04T21:48:53+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2015-11-28T22:56:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=159c52e15f95712dd22aa5d64b17a79a7fd8f939'/>
<id>159c52e15f95712dd22aa5d64b17a79a7fd8f939</id>
<content type='text'>
commit ef2b1d777d643af227a22309d8b79898b90b123c upstream.

The atlas7 clock controller driver registers a reset controller
for itself, which causes a link error when the subsystem is
disabled:

drivers/built-in.o: In function `atlas7_clk_init':
drivers/clk/sirf/clk-atlas7.c:1681: undefined reference to `reset_controller_register'

As the clk driver does not have a Kconfig symbol for itself
but it always built-in when the platform is enabled, we have
to ensure that the reset controller subsystem is also built-in
in this case.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Fixes: 301c5d29402e ("clk: sirf: add CSR atlas7 clk and reset support")
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit ef2b1d777d643af227a22309d8b79898b90b123c upstream.

The atlas7 clock controller driver registers a reset controller
for itself, which causes a link error when the subsystem is
disabled:

drivers/built-in.o: In function `atlas7_clk_init':
drivers/clk/sirf/clk-atlas7.c:1681: undefined reference to `reset_controller_register'

As the clk driver does not have a Kconfig symbol for itself
but it always built-in when the platform is enabled, we have
to ensure that the reset controller subsystem is also built-in
in this case.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Fixes: 301c5d29402e ("clk: sirf: add CSR atlas7 clk and reset support")
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: Remove __ref on hotplug cpu die path</title>
<updated>2015-10-22T16:55:03+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2015-10-19T20:05:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b96fc2f3c145815359ac1f9f12cc5c852b9ba3f5'/>
<id>b96fc2f3c145815359ac1f9f12cc5c852b9ba3f5</id>
<content type='text'>
Now that __cpuinit has been removed, the __ref markings on these
functions are useless. Remove them. This also reduces the size of
the multi_v7_defconfig image:

$ size before after
   text    data     bss     dec     hex filename
   12683578        1470996  348904 14503478         dd4e36 before
   12683274        1470996  348904 14503174         dd4d06 after

presumably because now we don't have to jump to code in the
.ref.text section and/or the noinline marking is removed.

Cc: Shiraz Hashim &lt;shiraz.linux.kernel@gmail.com&gt;
Cc: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Alexandre Courbot &lt;gnurou@gmail.com&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: &lt;linux-omap@vger.kernel.org&gt;
Cc: &lt;linux-arm-msm@vger.kernel.org&gt;
Cc: &lt;spear-devel@list.st.com&gt;
Cc: &lt;linux-tegra@vger.kernel.org&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Barry Song &lt;baohua@kernel.org&gt;
Acked-by: Andy Gross &lt;agross@codeaurora.org&gt;
Acked-by: Viresh Kumar &lt;vireshk@kernel.org&gt;
Acked-by: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that __cpuinit has been removed, the __ref markings on these
functions are useless. Remove them. This also reduces the size of
the multi_v7_defconfig image:

$ size before after
   text    data     bss     dec     hex filename
   12683578        1470996  348904 14503478         dd4e36 before
   12683274        1470996  348904 14503174         dd4d06 after

presumably because now we don't have to jump to code in the
.ref.text section and/or the noinline marking is removed.

Cc: Shiraz Hashim &lt;shiraz.linux.kernel@gmail.com&gt;
Cc: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Alexandre Courbot &lt;gnurou@gmail.com&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: &lt;linux-omap@vger.kernel.org&gt;
Cc: &lt;linux-arm-msm@vger.kernel.org&gt;
Cc: &lt;spear-devel@list.st.com&gt;
Cc: &lt;linux-tegra@vger.kernel.org&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Barry Song &lt;baohua@kernel.org&gt;
Acked-by: Andy Gross &lt;agross@codeaurora.org&gt;
Acked-by: Viresh Kumar &lt;vireshk@kernel.org&gt;
Acked-by: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'cleanup', 'fixes', 'misc', 'omap-barrier' and 'uaccess' into for-linus</title>
<updated>2015-09-03T14:28:37+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2015-09-03T14:28:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=40d3f02851577da27b5cbb1538888301245ef1e7'/>
<id>40d3f02851577da27b5cbb1538888301245ef1e7</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: move heavy barrier support out of line</title>
<updated>2015-07-25T14:28:05+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2015-06-01T22:44:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f81309067ff2d84788316c513a415f6bb8c9171f'/>
<id>f81309067ff2d84788316c513a415f6bb8c9171f</id>
<content type='text'>
The existing memory barrier macro causes a significant amount of code
to be inserted inline at every call site.  For example, in
gpio_set_irq_type(), we have this for mb():

c0344c08:       f57ff04e        dsb     st
c0344c0c:       e59f8190        ldr     r8, [pc, #400]  ; c0344da4 &lt;gpio_set_irq_type+0x230&gt;
c0344c10:       e3590004        cmp     r9, #4
c0344c14:       e5983014        ldr     r3, [r8, #20]
c0344c18:       0a000054        beq     c0344d70 &lt;gpio_set_irq_type+0x1fc&gt;
c0344c1c:       e3530000        cmp     r3, #0
c0344c20:       0a000004        beq     c0344c38 &lt;gpio_set_irq_type+0xc4&gt;
c0344c24:       e50b2030        str     r2, [fp, #-48]  ; 0xffffffd0
c0344c28:       e50bc034        str     ip, [fp, #-52]  ; 0xffffffcc
c0344c2c:       e12fff33        blx     r3
c0344c30:       e51bc034        ldr     ip, [fp, #-52]  ; 0xffffffcc
c0344c34:       e51b2030        ldr     r2, [fp, #-48]  ; 0xffffffd0
c0344c38:       e5963004        ldr     r3, [r6, #4]

Moving the outer_cache_sync() call out of line reduces the impact of
the barrier:

c0344968:       f57ff04e        dsb     st
c034496c:       e35a0004        cmp     sl, #4
c0344970:       e50b2030        str     r2, [fp, #-48]  ; 0xffffffd0
c0344974:       0a000044        beq     c0344a8c &lt;gpio_set_irq_type+0x1b8&gt;
c0344978:       ebf363dd        bl      c001d8f4 &lt;arm_heavy_mb&gt;
c034497c:       e5953004        ldr     r3, [r5, #4]

This should reduce the cache footprint of this code.  Overall, this
results in a reduction of around 20K in the kernel size:

    text    data      bss      dec     hex filename
10773970  667392 10369656 21811018 14ccf4a ../build/imx6/vmlinux-old
10754219  667392 10369656 21791267 14c8223 ../build/imx6/vmlinux-new

Another advantage to this approach is that we can finally resolve the
issue of SoCs which have their own memory barrier requirements within
multiplatform kernels (such as OMAP.)  Here, the bus interconnects
need additional handling to ensure that writes become visible in the
correct order (eg, between dma_map() operations, writes to DMA
coherent memory, and MMIO accesses.)

Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Richard Woodruff &lt;r-woodruff2@ti.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The existing memory barrier macro causes a significant amount of code
to be inserted inline at every call site.  For example, in
gpio_set_irq_type(), we have this for mb():

c0344c08:       f57ff04e        dsb     st
c0344c0c:       e59f8190        ldr     r8, [pc, #400]  ; c0344da4 &lt;gpio_set_irq_type+0x230&gt;
c0344c10:       e3590004        cmp     r9, #4
c0344c14:       e5983014        ldr     r3, [r8, #20]
c0344c18:       0a000054        beq     c0344d70 &lt;gpio_set_irq_type+0x1fc&gt;
c0344c1c:       e3530000        cmp     r3, #0
c0344c20:       0a000004        beq     c0344c38 &lt;gpio_set_irq_type+0xc4&gt;
c0344c24:       e50b2030        str     r2, [fp, #-48]  ; 0xffffffd0
c0344c28:       e50bc034        str     ip, [fp, #-52]  ; 0xffffffcc
c0344c2c:       e12fff33        blx     r3
c0344c30:       e51bc034        ldr     ip, [fp, #-52]  ; 0xffffffcc
c0344c34:       e51b2030        ldr     r2, [fp, #-48]  ; 0xffffffd0
c0344c38:       e5963004        ldr     r3, [r6, #4]

Moving the outer_cache_sync() call out of line reduces the impact of
the barrier:

c0344968:       f57ff04e        dsb     st
c034496c:       e35a0004        cmp     sl, #4
c0344970:       e50b2030        str     r2, [fp, #-48]  ; 0xffffffd0
c0344974:       0a000044        beq     c0344a8c &lt;gpio_set_irq_type+0x1b8&gt;
c0344978:       ebf363dd        bl      c001d8f4 &lt;arm_heavy_mb&gt;
c034497c:       e5953004        ldr     r3, [r5, #4]

This should reduce the cache footprint of this code.  Overall, this
results in a reduction of around 20K in the kernel size:

    text    data      bss      dec     hex filename
10773970  667392 10369656 21811018 14ccf4a ../build/imx6/vmlinux-old
10754219  667392 10369656 21791267 14c8223 ../build/imx6/vmlinux-new

Another advantage to this approach is that we can finally resolve the
issue of SoCs which have their own memory barrier requirements within
multiplatform kernels (such as OMAP.)  Here, the bus interconnects
need additional handling to ensure that writes become visible in the
correct order (eg, between dma_map() operations, writes to DMA
coherent memory, and MMIO accesses.)

Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Richard Woodruff &lt;r-woodruff2@ti.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'sirf-iobrg2regmap-for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into fixes</title>
<updated>2015-07-08T21:20:12+00:00</updated>
<author>
<name>Kevin Hilman</name>
<email>khilman@linaro.org</email>
</author>
<published>2015-07-08T21:20:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8dfaf05682ebb9be8aaf29538f1acf89d885ef44'/>
<id>8dfaf05682ebb9be8aaf29538f1acf89d885ef44</id>
<content type='text'>
Merge "CSR SiRFSoC rtc iobrg move to regmap for 4.2" from Barry Song:

move CSR rtc iobrg read/write API to be regmap

this moves to general APIs, and all drivers will be changed based
on it.

* tag 'sirf-iobrg2regmap-for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
  ARM: prima2: move to use REGMAP APIs for rtciobrg
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Merge "CSR SiRFSoC rtc iobrg move to regmap for 4.2" from Barry Song:

move CSR rtc iobrg read/write API to be regmap

this moves to general APIs, and all drivers will be changed based
on it.

* tag 'sirf-iobrg2regmap-for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
  ARM: prima2: move to use REGMAP APIs for rtciobrg
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: prima2: move to use REGMAP APIs for rtciobrg</title>
<updated>2015-06-10T07:10:26+00:00</updated>
<author>
<name>Guo Zeng</name>
<email>Guo.Zeng@csr.com</email>
</author>
<published>2015-04-14T11:55:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b1999477ed91c3c33891acfe0e18a4457e5c4915'/>
<id>b1999477ed91c3c33891acfe0e18a4457e5c4915</id>
<content type='text'>
all devices behind rtciobrg needs a special way to access. currently they
are using a platform-specific API.
this patch moves to REGMAP, then clients can use regmap APIs to read/write.
for the moment, old APIs are still kept, once all clients move to regmap,
old APIs will be dropped.

this patch also does minor clean for comments, authors statement.

Signed-off-by: Guo Zeng &lt;Guo.Zeng@csr.com&gt;
Signed-off-by: Barry Song &lt;Baohua.Song@csr.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
all devices behind rtciobrg needs a special way to access. currently they
are using a platform-specific API.
this patch moves to REGMAP, then clients can use regmap APIs to read/write.
for the moment, old APIs are still kept, once all clients move to regmap,
old APIs will be dropped.

this patch also does minor clean for comments, authors statement.

Signed-off-by: Guo Zeng &lt;Guo.Zeng@csr.com&gt;
Signed-off-by: Barry Song &lt;Baohua.Song@csr.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: v7 setup function should invalidate L1 cache</title>
<updated>2015-06-01T10:30:26+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2015-05-19T16:06:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=02b4e2756e01c623cc4dbceae4b07be75252db5b'/>
<id>02b4e2756e01c623cc4dbceae4b07be75252db5b</id>
<content type='text'>
All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU.  This is because the L1
cache should not contain any data relevant to the execution of the
kernel at this point; all data should have been flushed out to memory.

This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
these typically do not search their caches when caching is disabled (as
it needs to be when the MMU is disabled) so this change should be safe.

ARMv7 allows there to be CPUs which search their caches while caching is
disabled, and it's permitted that the cache is uninitialised at boot;
for these, the architecture reference manual requires that an
implementation specific code sequence is used immediately after reset
to ensure that the cache is placed into a sane state.  Such
functionality is definitely outside the remit of the Linux kernel, and
must be done by the SoC's firmware before _any_ CPU gets to the Linux
kernel.

Changing the data cache clean+invalidate to a mere invalidate allows us
to get rid of a lot of platform specific hacks around this issue for
their secondary CPU bringup paths - some of which were buggy.

Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Tested-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Tested-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Tested-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Acked-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Tested-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Acked-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Tested-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Tested-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Tested-by: Wei Xu &lt;xuwei5@hisilicon.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU.  This is because the L1
cache should not contain any data relevant to the execution of the
kernel at this point; all data should have been flushed out to memory.

This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
these typically do not search their caches when caching is disabled (as
it needs to be when the MMU is disabled) so this change should be safe.

ARMv7 allows there to be CPUs which search their caches while caching is
disabled, and it's permitted that the cache is uninitialised at boot;
for these, the architecture reference manual requires that an
implementation specific code sequence is used immediately after reset
to ensure that the cache is placed into a sane state.  Such
functionality is definitely outside the remit of the Linux kernel, and
must be done by the SoC's firmware before _any_ CPU gets to the Linux
kernel.

Changing the data cache clean+invalidate to a mere invalidate allows us
to get rid of a lot of platform specific hacks around this issue for
their secondary CPU bringup paths - some of which were buggy.

Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Tested-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Tested-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Tested-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Acked-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Tested-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Acked-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Tested-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Tested-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Tested-by: Wei Xu &lt;xuwei5@hisilicon.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: make of_device_ids const</title>
<updated>2015-02-19T08:44:25+00:00</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@pengutronix.de</email>
</author>
<published>2015-02-18T20:19:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=444d2d33d8564f95df851ddaca80f640ca36934d'/>
<id>444d2d33d8564f95df851ddaca80f640ca36934d</id>
<content type='text'>
of_device_ids (i.e. compatible strings and the respective data) are not
supposed to change at runtime. All functions working with of_device_ids
provided by &lt;linux/of.h&gt; work with const of_device_ids. So mark the
non-const structs in arch/arm as const, too.

While at it also add some __initconst annotations.

Acked-by: Jason Cooper &lt;jason@lakedameon.net&gt;
Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
of_device_ids (i.e. compatible strings and the respective data) are not
supposed to change at runtime. All functions working with of_device_ids
provided by &lt;linux/of.h&gt; work with const of_device_ids. So mark the
non-const structs in arch/arm as const, too.

While at it also add some __initconst annotations.

Acked-by: Jason Cooper &lt;jason@lakedameon.net&gt;
Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: make arrays containing machine compatible strings const</title>
<updated>2015-02-19T08:44:17+00:00</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@pengutronix.de</email>
</author>
<published>2015-02-18T20:01:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=543c5040f564c80fe59ae82a60fc061055d04a41'/>
<id>543c5040f564c80fe59ae82a60fc061055d04a41</id>
<content type='text'>
The definition

	static const char *axxia_dt_match[] __initconst = {
		...

defines a changable array of constant strings. That is you must not do:

	*axxia_dt_match[0] = 'k';

but

	axxia_dt_match[0] = "different string";

is fine. So the annotation __initconst is wrong and yields a compiler
error when other really const variables are added with __initconst.

As the struct machine_desc member dt_compat is declared as

	const char *const *dt_compat;

making the arrays const is the better alternative over changing all
annotations to __initdata.

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The definition

	static const char *axxia_dt_match[] __initconst = {
		...

defines a changable array of constant strings. That is you must not do:

	*axxia_dt_match[0] = 'k';

but

	axxia_dt_match[0] = "different string";

is fine. So the annotation __initconst is wrong and yields a compiler
error when other really const variables are added with __initconst.

As the struct machine_desc member dt_compat is declared as

	const char *const *dt_compat;

making the arrays const is the better alternative over changing all
annotations to __initdata.

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: prima2: do not select SMP_ON_UP</title>
<updated>2015-02-18T11:20:27+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2015-01-25T14:01:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d76f733ddad6ebc5166675a77824673588797202'/>
<id>d76f733ddad6ebc5166675a77824673588797202</id>
<content type='text'>
The new Atlas7 platform implicitly selects 'CONFIG_SMP_ON_UP',
which leads to problems if we enable building the platform without
MMU, as that combination is not allowed and causes a link error:

arch/arm/kernel/built-in.o: In function `c_show':
:(.text+0x1872): undefined reference to `smp_on_up'
:(.text+0x1876): undefined reference to `smp_on_up'
arch/arm/kernel/built-in.o: In function `arch_irq_work_raise':
:(.text+0x3d48): undefined reference to `smp_on_up'
:(.text+0x3d4c): undefined reference to `smp_on_up'
arch/arm/kernel/built-in.o: In function `smp_setup_processor_id':
:(.init.text+0x180): undefined reference to `smp_on_up'

This removes the 'select' statement.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Fixes: 4cba058526a7 ("ARM: sirf: add Atlas7 machine support")
Acked-by: Barry Song &lt;Baohua.Song@csr.com&gt;
Cc: Zhiwu Song &lt;Zhiwu.Song@csr.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The new Atlas7 platform implicitly selects 'CONFIG_SMP_ON_UP',
which leads to problems if we enable building the platform without
MMU, as that combination is not allowed and causes a link error:

arch/arm/kernel/built-in.o: In function `c_show':
:(.text+0x1872): undefined reference to `smp_on_up'
:(.text+0x1876): undefined reference to `smp_on_up'
arch/arm/kernel/built-in.o: In function `arch_irq_work_raise':
:(.text+0x3d48): undefined reference to `smp_on_up'
:(.text+0x3d4c): undefined reference to `smp_on_up'
arch/arm/kernel/built-in.o: In function `smp_setup_processor_id':
:(.init.text+0x180): undefined reference to `smp_on_up'

This removes the 'select' statement.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Fixes: 4cba058526a7 ("ARM: sirf: add Atlas7 machine support")
Acked-by: Barry Song &lt;Baohua.Song@csr.com&gt;
Cc: Zhiwu Song &lt;Zhiwu.Song@csr.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
