<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/arm/mach-rockchip, branch v4.14</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm</title>
<updated>2017-09-12T13:10:44+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-09-12T13:10:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8fac2f96ab86b0e14ec4e42851e21e9b518bdc55'/>
<id>8fac2f96ab86b0e14ec4e42851e21e9b518bdc55</id>
<content type='text'>
Pull ARM updates from Russell King:
 "Low priority fixes and updates for ARM:

   - add some missing includes

   - efficiency improvements in system call entry code when tracing is
     enabled

   - ensure ARMv6+ is always built as EABI

   - export save_stack_trace_tsk()

   - fix fatal signal handling during mm fault

   - build translation table base address register from scratch

   - appropriately align the .data section to a word boundary where we
     rely on that data being word aligned"

* 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8691/1: Export save_stack_trace_tsk()
  ARM: 8692/1: mm: abort uaccess retries upon fatal signal
  ARM: 8690/1: lpae: build TTB control register value from scratch in v7_ttb_setup
  ARM: align .data section
  ARM: always enable AEABI for ARMv6+
  ARM: avoid saving and restoring registers unnecessarily
  ARM: move PC value into r9
  ARM: obtain thread info structure later
  ARM: use aliases for registers in entry-common
  ARM: 8689/1: scu: add missing errno include
  ARM: 8688/1: pm: add missing types include
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM updates from Russell King:
 "Low priority fixes and updates for ARM:

   - add some missing includes

   - efficiency improvements in system call entry code when tracing is
     enabled

   - ensure ARMv6+ is always built as EABI

   - export save_stack_trace_tsk()

   - fix fatal signal handling during mm fault

   - build translation table base address register from scratch

   - appropriately align the .data section to a word boundary where we
     rely on that data being word aligned"

* 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8691/1: Export save_stack_trace_tsk()
  ARM: 8692/1: mm: abort uaccess retries upon fatal signal
  ARM: 8690/1: lpae: build TTB control register value from scratch in v7_ttb_setup
  ARM: align .data section
  ARM: always enable AEABI for ARMv6+
  ARM: avoid saving and restoring registers unnecessarily
  ARM: move PC value into r9
  ARM: obtain thread info structure later
  ARM: use aliases for registers in entry-common
  ARM: 8689/1: scu: add missing errno include
  ARM: 8688/1: pm: add missing types include
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'fixes' and 'misc' into for-linus</title>
<updated>2017-09-09T15:34:41+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@armlinux.org.uk</email>
</author>
<published>2017-09-09T15:34:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e558bdc21ae1f0db520eccd84015e17d8a589973'/>
<id>e558bdc21ae1f0db520eccd84015e17d8a589973</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'next/cleanup' into next/soc</title>
<updated>2017-09-06T03:29:46+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2017-09-06T03:29:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9ec83463d679a51560135ac8cf023567fbb6e4c0'/>
<id>9ec83463d679a51560135ac8cf023567fbb6e4c0</id>
<content type='text'>
* next/cleanup:
  soc: versatile: remove unnecessary static in realview_soc_probe()
  ARM: Convert to using %pOF instead of full_name
  ARM: hisi: Fix typo in comment
  ARM: OMAP4+: PRM: fix of_irq_get() result checks
  ARM: OMAP3+: PRM: fix of_irq_get() result check
  ARM: dts: dra72-evm-revc: workaround incorrect DP83867 RX_CTRL pin strap
  ARM: dts: dra71-evm: workaround incorrect DP83867 RX_CTRL pin strap
  ARM: OMAP2+: omap_device: drop broken RPM status update from suspend_noirq
  bus: omap-ocp2scp: Fix error handling in omap_ocp2scp_probe
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* next/cleanup:
  soc: versatile: remove unnecessary static in realview_soc_probe()
  ARM: Convert to using %pOF instead of full_name
  ARM: hisi: Fix typo in comment
  ARM: OMAP4+: PRM: fix of_irq_get() result checks
  ARM: OMAP3+: PRM: fix of_irq_get() result check
  ARM: dts: dra72-evm-revc: workaround incorrect DP83867 RX_CTRL pin strap
  ARM: dts: dra71-evm: workaround incorrect DP83867 RX_CTRL pin strap
  ARM: OMAP2+: omap_device: drop broken RPM status update from suspend_noirq
  bus: omap-ocp2scp: Fix error handling in omap_ocp2scp_probe
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: Convert to using %pOF instead of full_name</title>
<updated>2017-08-16T20:25:30+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2017-07-21T19:28:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a8e65e06ec66f8657795162c51ee73bec116a890'/>
<id>a8e65e06ec66f8657795162c51ee73bec116a890</id>
<content type='text'>
Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Acked-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
Acked-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
Cc: Russell King &lt;linux@armlinux.org.uk&gt;
Cc: Kukjin Kim &lt;kgene@kernel.org&gt;
Cc: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Cc: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Cc: Tony Lindgren &lt;tony@atomide.com&gt;
Cc: "Benoît Cousson" &lt;bcousson@baylibre.com&gt;
Cc: Paul Walmsley &lt;paul@pwsan.com&gt;
Cc: Magnus Damm &lt;magnus.damm@gmail.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Acked-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
Acked-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
Cc: Russell King &lt;linux@armlinux.org.uk&gt;
Cc: Kukjin Kim &lt;kgene@kernel.org&gt;
Cc: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Cc: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Cc: Tony Lindgren &lt;tony@atomide.com&gt;
Cc: "Benoît Cousson" &lt;bcousson@baylibre.com&gt;
Cc: Paul Walmsley &lt;paul@pwsan.com&gt;
Cc: Magnus Damm &lt;magnus.damm@gmail.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: align .data section</title>
<updated>2017-08-14T15:22:55+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@armlinux.org.uk</email>
</author>
<published>2017-07-26T11:49:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1abd35023763c099bf4ee7558faa261d5c9d5025'/>
<id>1abd35023763c099bf4ee7558faa261d5c9d5025</id>
<content type='text'>
Robert Jarzmik reports that his PXA25x system fails to boot with 4.12,
failing at __flush_whole_cache in arch/arm/mm/proc-xscale.S:215:

   0xc0019e20 &lt;+0&gt;:     ldr     r1, [pc, #788]
   0xc0019e24 &lt;+4&gt;:     ldr     r0, [r1]	&lt;== here

with r1 containing 0xc06f82cd, which is the address of "clean_addr".
Examination of the System.map shows:

c06f22c8 D user_pmd_table
c06f22cc d __warned.19178
c06f22cd d clean_addr

indicating that a .data.unlikely section has appeared just before the
.data section from proc-xscale.S.  According to objdump -h, it appears
that our assembly files default their .data alignment to 2**0, which
is bad news if the preceding .data section size is not power-of-2
aligned at link time.

Add the appropriate .align directives to all assembly files in arch/arm
that are missing them where we require an appropriate alignment.

Reported-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
Tested-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Robert Jarzmik reports that his PXA25x system fails to boot with 4.12,
failing at __flush_whole_cache in arch/arm/mm/proc-xscale.S:215:

   0xc0019e20 &lt;+0&gt;:     ldr     r1, [pc, #788]
   0xc0019e24 &lt;+4&gt;:     ldr     r0, [r1]	&lt;== here

with r1 containing 0xc06f82cd, which is the address of "clean_addr".
Examination of the System.map shows:

c06f22c8 D user_pmd_table
c06f22cc d __warned.19178
c06f22cd d clean_addr

indicating that a .data.unlikely section has appeared just before the
.data section from proc-xscale.S.  According to objdump -h, it appears
that our assembly files default their .data alignment to 2**0, which
is bad news if the preceding .data section size is not power-of-2
aligned at link time.

Add the appropriate .align directives to all assembly files in arch/arm
that are missing them where we require an appropriate alignment.

Reported-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
Tested-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: rockchip: select ARCH_DMA_ADDR_T_64BIT for LPAE</title>
<updated>2017-08-06T11:06:05+00:00</updated>
<author>
<name>Tao Huang</name>
<email>huangtao@rock-chips.com</email>
</author>
<published>2017-08-01T09:55:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=58ed5e5733b293f03a302612d395ac747021b946'/>
<id>58ed5e5733b293f03a302612d395ac747021b946</id>
<content type='text'>
Rockchip RK3288 has some 64-bit capable DMA and therefore needs
dma_addr_t to be a 64-bit size. One user is the Mali GPU.

Signed-off-by: Tao Huang &lt;huangtao@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Rockchip RK3288 has some 64-bit capable DMA and therefore needs
dma_addr_t to be a 64-bit size. One user is the Mali GPU.

Signed-off-by: Tao Huang &lt;huangtao@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: rockchip: enable ZONE_DMA for non 64-bit capable peripherals</title>
<updated>2017-07-31T22:57:59+00:00</updated>
<author>
<name>Tao Huang</name>
<email>huangtao@rock-chips.com</email>
</author>
<published>2017-07-28T06:40:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bf3c4b517c2e2217e6cd53bc7a44e321bb799d75'/>
<id>bf3c4b517c2e2217e6cd53bc7a44e321bb799d75</id>
<content type='text'>
Most IP cores on ARM Rockchip platforms can only address 32 bits of
physical memory for DMA. Thus ZONE_DMA should be enabled when LPAE
is activated.

Signed-off-by: Tao Huang &lt;huangtao@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Most IP cores on ARM Rockchip platforms can only address 32 bits of
physical memory for DMA. Thus ZONE_DMA should be enabled when LPAE
is activated.

Signed-off-by: Tao Huang &lt;huangtao@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: rockchip: explicitly request exclusive reset control in smp code</title>
<updated>2017-07-20T20:26:26+00:00</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2017-07-19T15:25:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=da45adf97f57a561fc290e7cdd3a3dcb184cc88e'/>
<id>da45adf97f57a561fc290e7cdd3a3dcb184cc88e</id>
<content type='text'>
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
reset lines") started to transition the reset control request API calls
to explicitly state whether the driver needs exclusive or shared reset
control behavior. Convert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.

No functional changes.

Cc: Heiko Stuebner &lt;heiko@sntech.de&gt;
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
reset lines") started to transition the reset control request API calls
to explicitly state whether the driver needs exclusive or shared reset
control behavior. Convert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.

No functional changes.

Cc: Heiko Stuebner &lt;heiko@sntech.de&gt;
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2017-07-04T21:34:51+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-07-04T21:34:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8ca302e9c61a1b8852f4bd4def8e7ff59f4c729a'/>
<id>8ca302e9c61a1b8852f4bd4def8e7ff59f4c729a</id>
<content type='text'>
Pull ARM SoC platform updates from Arnd Bergmann:
 "SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
  for a few platforms:

   - Andres Färber adds initial support for the Actions Semi S500 (aka
     'owl') platform, a close relative of the S900 platform he adds for
     arm64.

   - in mach-omap2, we remove more legacy code

   - Rockchips gains support for the RV1108 SoC designed for camera
     applications.

   - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)

   - Minor updates for other platforms, including davinci, s3c64xx,
     prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
  ARM: owl: smp: Drop bogus holding pen
  ARM: owl: Drop custom machine
  ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3
  soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating
  soc: actions: Add Owl SPS
  dt-bindings: power: Add Owl SPS power domains
  MAINTAINERS: Update Actions Semi section with SPS
  ARM: owl: Implement CPU enable-method for S500
  MAINTAINERS: Add Actions Semi Owl section
  ARM: Prepare Actions Semi S500
  ARM: socfpga: Increase max number of GPIOs
  ARM: stm32: Introduce MACH_STM32F469 flag
  ARM: prima2: remove redundant select CPU_V7
  ARM: davinci: fix const warnings
  ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON
  ARM: OMAP4: hwmod_data: add SHAM crypto accelerator
  ARM: OMAP4: hwmod data: add des
  ARM: OMAP4: hwmod data: add aes2
  ARM: OMAP4: hwmod data: add aes1
  ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe()
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC platform updates from Arnd Bergmann:
 "SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
  for a few platforms:

   - Andres Färber adds initial support for the Actions Semi S500 (aka
     'owl') platform, a close relative of the S900 platform he adds for
     arm64.

   - in mach-omap2, we remove more legacy code

   - Rockchips gains support for the RV1108 SoC designed for camera
     applications.

   - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)

   - Minor updates for other platforms, including davinci, s3c64xx,
     prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
  ARM: owl: smp: Drop bogus holding pen
  ARM: owl: Drop custom machine
  ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3
  soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating
  soc: actions: Add Owl SPS
  dt-bindings: power: Add Owl SPS power domains
  MAINTAINERS: Update Actions Semi section with SPS
  ARM: owl: Implement CPU enable-method for S500
  MAINTAINERS: Add Actions Semi Owl section
  ARM: Prepare Actions Semi S500
  ARM: socfpga: Increase max number of GPIOs
  ARM: stm32: Introduce MACH_STM32F469 flag
  ARM: prima2: remove redundant select CPU_V7
  ARM: davinci: fix const warnings
  ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON
  ARM: OMAP4: hwmod_data: add SHAM crypto accelerator
  ARM: OMAP4: hwmod data: add des
  ARM: OMAP4: hwmod data: add aes2
  ARM: OMAP4: hwmod data: add aes1
  ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe()
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers: Rename clocksource_probe to timer_probe</title>
<updated>2017-06-14T09:59:16+00:00</updated>
<author>
<name>Daniel Lezcano</name>
<email>daniel.lezcano@linaro.org</email>
</author>
<published>2017-05-26T15:40:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ba5d08c0ea785d5710c5a1e7dc3182b7124d63c0'/>
<id>ba5d08c0ea785d5710c5a1e7dc3182b7124d63c0</id>
<content type='text'>
The function name is now renamed to 'timer_probe' for consistency with
the CLOCKSOURCE_OF_DECLARE =&gt; TIMER_OF_DECLARE change.

Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The function name is now renamed to 'timer_probe' for consistency with
the CLOCKSOURCE_OF_DECLARE =&gt; TIMER_OF_DECLARE change.

Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
