<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/arm/mach-sti, branch v4.4.93</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-09-01T19:18:40+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-09-01T19:18:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=50686e8a3aed2f5d295e9d2e79ff43df461c7b76'/>
<id>50686e8a3aed2f5d295e9d2e79ff43df461c7b76</id>
<content type='text'>
Pull ARM SoC platform updates from Olof Johansson:
 "New or improved SoC support:

   - add support for Atmel's SAMA5D2 SoC
   - add support for Freescale i.MX6UL
   - improved support for TI's DM814x platform
   - misc fixes and improvements for RockChip platforms
   - Marvell MVEBU suspend/resume support

  A few driver changes that ideally would belong in the drivers branch
  are also here (acked by appropriate maintainers):

   - power key input driver for Freescale platforms (svns)
   - RTC driver updates for Freescale platforms (svns/mxc)
   - clk fixes for TI DM814/816X

  + a bunch of other changes for various platforms"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: rockchip: pm: Fix PTR_ERR() argument
  ARM: imx: mach-imx6ul: Fix allmodconfig build
  clk: ti: fix for definition movement
  ARM: uniphier: drop v7_invalidate_l1 call at secondary entry
  memory: kill off set_irq_flags usage
  rtc: snvs: select option REGMAP_MMIO
  ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE
  ARM: BCM: Enable ARM erratum 798181 for BRCMSTB
  ARM: OMAP2+: Fix power domain operations regression caused by 81xx
  ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
  ARM: rockchip: set correct stabilization thresholds in suspend
  ARM: rockchip: rename osc_switch_to_32k variable
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback
  soc: mediatek: Fix SCPSYS compilation
  ARM: at91/soc: add basic support for new sama5d2 SoC
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC platform updates from Olof Johansson:
 "New or improved SoC support:

   - add support for Atmel's SAMA5D2 SoC
   - add support for Freescale i.MX6UL
   - improved support for TI's DM814x platform
   - misc fixes and improvements for RockChip platforms
   - Marvell MVEBU suspend/resume support

  A few driver changes that ideally would belong in the drivers branch
  are also here (acked by appropriate maintainers):

   - power key input driver for Freescale platforms (svns)
   - RTC driver updates for Freescale platforms (svns/mxc)
   - clk fixes for TI DM814/816X

  + a bunch of other changes for various platforms"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: rockchip: pm: Fix PTR_ERR() argument
  ARM: imx: mach-imx6ul: Fix allmodconfig build
  clk: ti: fix for definition movement
  ARM: uniphier: drop v7_invalidate_l1 call at secondary entry
  memory: kill off set_irq_flags usage
  rtc: snvs: select option REGMAP_MMIO
  ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE
  ARM: BCM: Enable ARM erratum 798181 for BRCMSTB
  ARM: OMAP2+: Fix power domain operations regression caused by 81xx
  ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
  ARM: rockchip: set correct stabilization thresholds in suspend
  ARM: rockchip: rename osc_switch_to_32k variable
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback
  soc: mediatek: Fix SCPSYS compilation
  ARM: at91/soc: add basic support for new sama5d2 SoC
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: appropriate __init annotation for const data</title>
<updated>2015-07-28T11:55:27+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nicolas.pitre@linaro.org</email>
</author>
<published>2015-07-27T22:27:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=19c233b79d1af7b5af1ec68c1172848648184449'/>
<id>19c233b79d1af7b5af1ec68c1172848648184449</id>
<content type='text'>
Init data marked const should be annotated with __initconst for
correctness and not __initdata.  In some cases the array gathering
references to that data has to be marked const as well. This fixes
LTO builds that otherwise fail with section mismatch errors.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Init data marked const should be annotated with __initconst for
correctness and not __initdata.  In some cases the array gathering
references to that data has to be marked const as well. This fixes
LTO builds that otherwise fail with section mismatch errors.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: STi: Remove platform call to trace_hardirqs_off()</title>
<updated>2015-07-22T09:15:30+00:00</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2015-06-09T21:47:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=50de4dd4bc6a6e378841a6705696d2c1f37ac038'/>
<id>50de4dd4bc6a6e378841a6705696d2c1f37ac038</id>
<content type='text'>
Calling trace_hardirqs_off() from the platform specific
secondary startup code as not been necessary since Dec 2010
when Russell King consolidated the call into the common SMP
code.

2c0136d ARM: SMP: consolidate trace_hardirqs_off() into common SMP code

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Calling trace_hardirqs_off() from the platform specific
secondary startup code as not been necessary since Dec 2010
when Russell King consolidated the call into the common SMP
code.

2c0136d ARM: SMP: consolidate trace_hardirqs_off() into common SMP code

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: STi: Add code to release secondary cores from holding pen.</title>
<updated>2015-07-22T09:14:18+00:00</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2015-06-09T13:33:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=94a8cfceaa7ee7e7187c5de074eb5138a6b77dcf'/>
<id>94a8cfceaa7ee7e7187c5de074eb5138a6b77dcf</id>
<content type='text'>
Most upstream devs boot STi platform via JTAG which abuses the
boot process by setting the PC of secondary cores directly. As
a consquence, booting STi platforms via u-boot results in only
the primary core being brought up as the code to manage the
holding pen is not upstream.

This patch adds the necessary code to bring the secondary cores
out of the holding pen. It uses the cpu-release-addr DT property
to get the address of the holding pen from the bootloader.

With this patch booting upstream kernels via u-boot works
correctly:

[    0.045456] CPU: Testing write buffer coherency: ok
[    0.045597] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.045734] Setting up static identity map for 0x40209000 - 0x40209098
[    0.065047] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.065081] Brought up 2 CPUs
[    0.065089] SMP: Total of 2 processors activated (5983.43 BogoMIPS).
[    0.065092] CPU: All CPU(s) started in SVC mode.

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Acked-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Most upstream devs boot STi platform via JTAG which abuses the
boot process by setting the PC of secondary cores directly. As
a consquence, booting STi platforms via u-boot results in only
the primary core being brought up as the code to manage the
holding pen is not upstream.

This patch adds the necessary code to bring the secondary cores
out of the holding pen. It uses the cpu-release-addr DT property
to get the address of the holding pen from the bootloader.

With this patch booting upstream kernels via u-boot works
correctly:

[    0.045456] CPU: Testing write buffer coherency: ok
[    0.045597] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.045734] Setting up static identity map for 0x40209000 - 0x40209098
[    0.065047] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.065081] Brought up 2 CPUs
[    0.065089] SMP: Total of 2 processors activated (5983.43 BogoMIPS).
[    0.065092] CPU: All CPU(s) started in SVC mode.

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Acked-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: STi: Ensure requested STi's SysCfg Controlled IRQs are enabled at boot</title>
<updated>2015-05-13T08:42:38+00:00</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2015-05-12T12:51:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=56439ab0e3ba2e62fe824f879ebea980f6a0e072'/>
<id>56439ab0e3ba2e62fe824f879ebea980f6a0e072</id>
<content type='text'>
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.

Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.

Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: STi: Add STiH410 SoC support</title>
<updated>2015-03-11T14:34:45+00:00</updated>
<author>
<name>Fabrice GASNIER</name>
<email>fabrice.gasnier@st.com</email>
</author>
<published>2015-03-05T15:53:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=60b3c7ed7197705716f32a34fafb5570cf4f129a'/>
<id>60b3c7ed7197705716f32a34fafb5570cf4f129a</id>
<content type='text'>
This patch adds support to STiH410 SoC.

Please note "st,stih410" is already present in device tree.
The problem is that it is missing the entry in the match table,
and so the L2 cache and other cpus than 0 don't get initialized.

Signed-off-by: Fabrice Gasnier &lt;fabrice.gasnier@st.com&gt;
Tested-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Acked-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Acked-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support to STiH410 SoC.

Please note "st,stih410" is already present in device tree.
The problem is that it is missing the entry in the match table,
and so the L2 cache and other cpus than 0 don't get initialized.

Signed-off-by: Fabrice Gasnier &lt;fabrice.gasnier@st.com&gt;
Tested-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Acked-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Acked-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: sti: always enable RESET_CONTROLLER</title>
<updated>2015-02-18T11:20:29+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2015-02-05T14:22:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1fd01aa2171d6daebc4efc045205834daf60b6c2'/>
<id>1fd01aa2171d6daebc4efc045205834daf60b6c2</id>
<content type='text'>
A lot of the sti device drivers require reset controller support,
but do not all have individual 'depends on RESET_CONTROLLER'
statements. Using 'select' here once avoids a lot of build errors
resulting from this.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Acked-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Cc: Srinivas Kandagatla &lt;srinivas.kandagatla@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
A lot of the sti device drivers require reset controller support,
but do not all have individual 'depends on RESET_CONTROLLER'
statements. Using 'select' here once avoids a lot of build errors
resulting from this.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Acked-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Cc: Srinivas Kandagatla &lt;srinivas.kandagatla@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: STi: Add STiH418 SoC support</title>
<updated>2015-01-16T12:10:21+00:00</updated>
<author>
<name>Maxime COQUELIN</name>
<email>maxime.coquelin@st.com</email>
</author>
<published>2015-01-09T15:11:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=dd548cf910809d2fb4429b42b899673bec1f3095'/>
<id>dd548cf910809d2fb4429b42b899673bec1f3095</id>
<content type='text'>
This patch adds support to STiH418 SoC.

Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support to STiH418 SoC.

Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: sti: Add STiH407 Kconfig entry to select STIH407_RESET</title>
<updated>2014-10-31T08:58:58+00:00</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2014-07-02T14:08:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c27321141915adea8ec0b5d9ab2f1787fcb70d8b'/>
<id>c27321141915adea8ec0b5d9ab2f1787fcb70d8b</id>
<content type='text'>
The STiH407 is a STMicroelectronics Digital Consumer electronics
family, targetted at set-top-box and other audio/video applications.

This patch selects the reset controller driver for this family which
is essential to take various IP's on the SoC out of powerdown / reset.

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Acked-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The STiH407 is a STMicroelectronics Digital Consumer electronics
family, targetted at set-top-box and other audio/video applications.

This patch selects the reset controller driver for this family which
is essential to take various IP's on the SoC out of powerdown / reset.

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Acked-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: sti: Staticize local variables</title>
<updated>2014-07-07T00:49:54+00:00</updated>
<author>
<name>Sachin Kamat</name>
<email>sachin.kamat@linaro.org</email>
</author>
<published>2014-06-24T11:43:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7e4588e83bf4edd7e8f64bc9b97832d62c5ac555'/>
<id>7e4588e83bf4edd7e8f64bc9b97832d62c5ac555</id>
<content type='text'>
Symbols local to this file are made static.

Signed-off-by: Sachin Kamat &lt;sachin.kamat@linaro.org&gt;
Signed-off-by: Sachin Kamat &lt;sachin.kamat@samsung.com&gt;
Acked-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Cc: kernel@stlinux.com
Cc: Srinivas Kandagatla &lt;srinivas.kandagatla@gmail.com&gt;
Cc: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Symbols local to this file are made static.

Signed-off-by: Sachin Kamat &lt;sachin.kamat@linaro.org&gt;
Signed-off-by: Sachin Kamat &lt;sachin.kamat@samsung.com&gt;
Acked-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Cc: kernel@stlinux.com
Cc: Srinivas Kandagatla &lt;srinivas.kandagatla@gmail.com&gt;
Cc: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
</feed>
