linux-toradex.git/arch/arm64/boot/dts/arm, branch master Linux kernel for Apalis and Colibri modules arm64: dts: arm/corstone1000: Add corstone-1000-a320 2026-03-23T10:03:28+00:00 Rob Herring (Arm) robh@kernel.org 2026-03-20T16:47:18+00:00 87599f1843d3baa4083dc9dd01c95826b536de24 The Corstone-1000-a320 is a Corstone-1000 derivative with Cortex-A320 cores, GIC-600, and Ethos-U85 NPU. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Message-Id: <20260320-dt-corstone1000-a320-v1-5-a549dfcfe8da@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org> 
The Corstone-1000-a320 is a Corstone-1000 derivative with Cortex-A320 cores,
GIC-600, and Ethos-U85 NPU.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Message-Id: <20260320-dt-corstone1000-a320-v1-5-a549dfcfe8da@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
arm64: dts: arm/corstone1000: Move FVP peripherals to separate .dtsi 2026-03-23T10:03:27+00:00 Rob Herring (Arm) robh@kernel.org 2026-03-20T16:47:17+00:00 9c3904f94fdbee59cd359d6a267595261d6039c4 The FVPs have a common set of peripherals specific to the FVP. Move these to a separate .dtsi so they can be shared across FVP platforms. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Message-Id: <20260320-dt-corstone1000-a320-v1-4-a549dfcfe8da@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org> 
The FVPs have a common set of peripherals specific to the FVP. Move
these to a separate .dtsi so they can be shared across FVP platforms.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Message-Id: <20260320-dt-corstone1000-a320-v1-4-a549dfcfe8da@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
arm64: dts: arm/corstone1000: Move cpu nodes 2026-03-23T10:03:27+00:00 Rob Herring (Arm) robh@kernel.org 2026-03-20T16:47:16+00:00 903528ac234ab354b68c5e3008986ee7123b1039 In preparation to add a new Corstone-1000 variation with different CPUs, move the CPU nodes into the specific platforms and out of the common corstone1000.dtsi. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Message-Id: <20260320-dt-corstone1000-a320-v1-3-a549dfcfe8da@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org> 
In preparation to add a new Corstone-1000 variation with different CPUs,
move the CPU nodes into the specific platforms and out of the common
corstone1000.dtsi.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Message-Id: <20260320-dt-corstone1000-a320-v1-3-a549dfcfe8da@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
arm64: dts: zena: Move SRAM into SoC and memory node out of SoC 2026-03-12T15:13:44+00:00 Debbie Horsfall debbie.horsfall@arm.com 2026-03-11T17:39:48+00:00 021915c7885fb1c83810930d527fa513877138d6 Move the SRAM node into the SoC node. Move the memory node out of the include to make it customizable for each platform variant. Signed-off-by: Debbie Horsfall <debbie.horsfall@arm.com> Message-Id: <20260311173948.3478931-1-debbie.horsfall@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org> 
Move the SRAM node into the SoC node. Move the memory node out of
the include to make it customizable for each platform variant.

Signed-off-by: Debbie Horsfall <debbie.horsfall@arm.com>
Message-Id: <20260311173948.3478931-1-debbie.horsfall@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
arm64: dts: zena: Add support for Zena CSS 2026-03-02T11:32:53+00:00 Debbie Horsfall debbie.horsfall@arm.com 2026-02-12T11:16:52+00:00 164148d0a16351ad3027cf3a3bb96d197633aecb Introduce the Zena CSS Fixed Virtual Platform (FVP) dts. This is currently the only Zena CSS variant, however the common definitions are included in a common dtsi for extensibility. Signed-off-by: Debbie Horsfall <debbie.horsfall@arm.com> Message-Id: <20260212-zena-css-v2-2-d33ea23cb9c2@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org> 
Introduce the Zena CSS Fixed Virtual Platform (FVP) dts. This is
currently the only Zena CSS variant, however the common definitions are
included in a common dtsi for extensibility.

Signed-off-by: Debbie Horsfall <debbie.horsfall@arm.com>
Message-Id: <20260212-zena-css-v2-2-d33ea23cb9c2@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
arm64: dts: arm: Use hyphen in node names 2026-01-01T17:31:07+00:00 Krzysztof Kozlowski krzysztof.kozlowski@oss.qualcomm.com 2025-12-23T15:24:58+00:00 f0d0f087227c4b63538e4ed8292f1fa26f8d6633 DTS coding style prefers hyphens instead of underscores in the node names. Change should be safe, because node names are not considered an ABI. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Message-Id: <20251223152457.155392-3-krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> 
DTS coding style prefers hyphens instead of underscores in the node
names.  Change should be safe, because node names are not considered an
ABI.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Message-Id: <20251223152457.155392-3-krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
arm64: dts: morello: Add CMN PMU 2025-12-15T10:41:13+00:00 Robin Murphy robin.murphy@arm.com 2025-05-27T12:55:39+00:00 01a23e376e2afd578c5ecb8c8263e107de3240b9 Although CMN-Skeena is mildly modified for the Morello hardware architecture, it still identifies itself as CMN-600 r3p1. Since there are also no documented changes to its PMU functionality, we can make the PMU accessible via the standard CMN-600 binding. In general, PMU registers are non-functional on CMN Fast Models, so this is only meaningful for the real SDP hardware. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Message-Id: <cbeb3832ded539c8c4616d49d3133078a34f88ad.1748350539.git.robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> 
Although CMN-Skeena is mildly modified for the Morello hardware
architecture, it still identifies itself as CMN-600 r3p1. Since
there are also no documented changes to its PMU functionality,
we can make the PMU accessible via the standard CMN-600 binding.
In general, PMU registers are non-functional on CMN Fast Models,
so this is only meaningful for the real SDP hardware.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Message-Id: <cbeb3832ded539c8c4616d49d3133078a34f88ad.1748350539.git.robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Merge tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 2025-05-31T15:08:56+00:00 Linus Torvalds torvalds@linux-foundation.org 2025-05-31T15:08:56+00:00 ec71f661a572a770d7c861cd52a50cbbb0e1a8d1 Pull SoC devicetree updates from Arnd Bergmann: "There are 11 newly supported SoCs, but these are all either new variants of existing designs, or straight reuses of the existing chip in a new package: - RK3562 is a new chip based on the old Cortex-A53 core, apparently a low-cost version of the Cortex-A55 based RK3568/RK3566. - NXP i.MX94 is a minor variation of i.MX93/i.MX95 with a different set of on-chip peripherals. - Renesas RZ/V2N (R9A09G056) is a new member of the larger RZ/V2 family - Amlogic S6/S7/S7D - Samsung Exynos7870 is an older chip similar to Exynos7885 - WonderMedia wm8950 is a minor variation on the wm8850 chip - Amlogic s805y is almost idential to s805x - Allwinner A523 is similar to A527 and T527 - Qualcomm MSM8926 is a variant of MSM8226 - Qualcomm Snapdragon X1P42100 is related to R1E80100 There are also 65 boards, including reference designs for the chips above, this includes - 12 new boards based on TI K3 series chips, most of them from Toradex - 10 devices using Rockchips RK35xx and PX30 chips - 2 phones and 2 laptops based on Qualcomm Snapdragon designs - 10 NXP i.MX8/i.MX9 boards, mostly for embedded/industrial uses - 3 Samsung Galaxy phones based on Exynos7870 - 5 Allwinner based boards using a variety of ARMv8 chips - 9 32-bit machines, each based on a different SoC family Aside from the new hardware, there is the usual set of cleanups and newly added hardware support on existing machines, for a total of 965 devicetree changesets" * tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (956 commits) MAINTAINERS, mailmap: update Sven Peter's email address arm64: dts: renesas: rzg3e-smarc-som: Reduce I2C2 clock frequency arm64: dts: nuvoton: Add pinctrl ARM: dts: samsung: sp5v210-aries: Align wifi node name with bindings arm64: dts: blaize-blzp1600: Enable GPIO support dt-bindings: clock: socfpga: convert to yaml arm64: dts: rockchip: move rk3562 pinctrl node outside the soc node arm64: dts: rockchip: fix rk3562 pcie unit addresses arm64: dts: rockchip: move rk3528 pinctrl node outside the soc node arm64: dts: rockchip: remove a double-empty line from rk3576 core dtsi arm64: dts: rockchip: move rk3576 pinctrl node outside the soc node arm64: dts: rockchip: fix rk3576 pcie unit addresses arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588 arm64: dts: rockchip: Add missing SFC power-domains to rk3576 Revert "arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0" arm64: dts: mediatek: mt8188: Address binding warnings for MDP3 nodes arm64: dts: mt6359: Rename RTC node to match binding expectations arm64: dts: mt8365-evk: Add goodix touchscreen support arm64: dts: mediatek: mt8188: Add missing #reset-cells property arm64: dts: airoha: en7581: Add PCIe nodes to EN7581 SoC evaluation board ... 
Pull SoC devicetree updates from Arnd Bergmann:
 "There are 11 newly supported SoCs, but these are all either new
  variants of existing designs, or straight reuses of the existing chip
  in a new package:

   - RK3562 is a new chip based on the old Cortex-A53 core, apparently a
     low-cost version of the Cortex-A55 based RK3568/RK3566.

   - NXP i.MX94 is a minor variation of i.MX93/i.MX95 with a different
     set of on-chip peripherals.

   - Renesas RZ/V2N (R9A09G056) is a new member of the larger RZ/V2
     family

   - Amlogic S6/S7/S7D

   - Samsung Exynos7870 is an older chip similar to Exynos7885

   - WonderMedia wm8950 is a minor variation on the wm8850 chip

   - Amlogic s805y is almost idential to s805x

   - Allwinner A523 is similar to A527 and T527

   - Qualcomm MSM8926 is a variant of MSM8226

   - Qualcomm Snapdragon X1P42100 is related to R1E80100

  There are also 65 boards, including reference designs for the chips
  above, this includes

   - 12 new boards based on TI K3 series chips, most of them from
     Toradex

   - 10 devices using Rockchips RK35xx and PX30 chips

   - 2 phones and 2 laptops based on Qualcomm Snapdragon designs

   - 10 NXP i.MX8/i.MX9 boards, mostly for embedded/industrial uses

   - 3 Samsung Galaxy phones based on Exynos7870

   - 5 Allwinner based boards using a variety of ARMv8 chips

   - 9 32-bit machines, each based on a different SoC family

  Aside from the new hardware, there is the usual set of cleanups and
  newly added hardware support on existing machines, for a total of 965
  devicetree changesets"

* tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (956 commits)
  MAINTAINERS, mailmap: update Sven Peter's email address
  arm64: dts: renesas: rzg3e-smarc-som: Reduce I2C2 clock frequency
  arm64: dts: nuvoton: Add pinctrl
  ARM: dts: samsung: sp5v210-aries: Align wifi node name with bindings
  arm64: dts: blaize-blzp1600: Enable GPIO support
  dt-bindings: clock: socfpga: convert to yaml
  arm64: dts: rockchip: move rk3562 pinctrl node outside the soc node
  arm64: dts: rockchip: fix rk3562 pcie unit addresses
  arm64: dts: rockchip: move rk3528 pinctrl node outside the soc node
  arm64: dts: rockchip: remove a double-empty line from rk3576 core dtsi
  arm64: dts: rockchip: move rk3576 pinctrl node outside the soc node
  arm64: dts: rockchip: fix rk3576 pcie unit addresses
  arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588
  arm64: dts: rockchip: Add missing SFC power-domains to rk3576
  Revert "arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0"
  arm64: dts: mediatek: mt8188: Address binding warnings for MDP3 nodes
  arm64: dts: mt6359: Rename RTC node to match binding expectations
  arm64: dts: mt8365-evk: Add goodix touchscreen support
  arm64: dts: mediatek: mt8188: Add missing #reset-cells property
  arm64: dts: airoha: en7581: Add PCIe nodes to EN7581 SoC evaluation board
  ...
arm64: dts: fvp: Add ETE and TRBE nodes for Rev C model 2025-05-12T17:52:08+00:00 Leo Yan leo.yan@arm.com 2025-05-12T15:11:49+00:00 6332351622db251b97639817a0e9ebc6f2394f87 The FVP Rev C model includes CoreSight ETE and TRBE support. These features can be enabled by specifying parameters when launching the model: | -C cluster0.has_ete: 1 | -C cluster1.has_ete: 1 | -C cluster0.has_trbe: 1 | -C cluster1.has_trbe: 1 This change adds device tree nodes for the ETE and TRBE. They are disabled by default to prevent kernel warnings from failed driver probes, as the model does not enable the features unless explicitly specified as mentioned above. Signed-off-by: Leo Yan <leo.yan@arm.com> Message-Id: <20250512151149.13111-1-leo.yan@arm.com> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> 
The FVP Rev C model includes CoreSight ETE and TRBE support. These
features can be enabled by specifying parameters when launching the
model:

  |  -C cluster0.has_ete: 1
  |  -C cluster1.has_ete: 1
  |  -C cluster0.has_trbe: 1
  |  -C cluster1.has_trbe: 1

This change adds device tree nodes for the ETE and TRBE. They are
disabled by default to prevent kernel warnings from failed driver
probes, as the model does not enable the features unless explicitly
specified as mentioned above.

Signed-off-by: Leo Yan <leo.yan@arm.com>
Message-Id: <20250512151149.13111-1-leo.yan@arm.com>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
arm64: dts: arm: Drop the clock-frequency property from timer nodes 2025-05-12T17:52:04+00:00 Sudeep Holla sudeep.holla@arm.com 2025-05-12T10:11:32+00:00 1fa3ed04ac55134063e3cd465b41aeb26715e52a Drop the clock-frequency property from the timer nodes, since it must be configured by the boot/secure firmware. Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lpieralisi@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Message-Id: <20250512101132.1743920-1-sudeep.holla@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> 
Drop the clock-frequency property from the timer nodes, since it must be
configured by the boot/secure firmware.

Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Message-Id: <20250512101132.1743920-1-sudeep.holla@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>