linux-toradex.git/arch/arm64/boot/dts/cavium, branch master Linux kernel for Apalis and Colibri modules arm64: dts: cavium: Drop thunder2 2025-12-22T10:04:37+00:00 Rob Herring (Arm) robh@kernel.org 2025-12-16T18:02:02+00:00 f25aa20e92305c7ab7a6387b8ef7b6e83f8a49fb The Cavium thunder2 DT support is incomplete. It consists of 4 cores (out of 128) and only a serial port. The thunder2 specific drivers in the kernel don't have DT support either. The few remaining users of this platform likely use ACPI. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251216180202.2794695-2-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> 
The Cavium thunder2 DT support is incomplete. It consists of 4 cores
(out of 128) and only a serial port. The thunder2 specific drivers in
the kernel don't have DT support either. The few remaining users of
this platform likely use ACPI.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20251216180202.2794695-2-robh@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
arm64: dts: cavium: thunder-88xx: Add missing PL011 "uartclk" 2025-12-22T10:03:58+00:00 Rob Herring (Arm) robh@kernel.org 2025-12-16T18:01:37+00:00 15e3ce53673289624bab4e6a60207af4775f4a38 The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The Thunder2 SoC is missing the core "uartclk". In this case, the Linux driver uses single clock for both clock inputs. Let's assume that's how the h/w is wired and make the DT reflect that. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251216180136.2794105-2-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> 
The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
Thunder2 SoC is missing the core "uartclk". In this case, the Linux
driver uses single clock for both clock inputs. Let's assume that's how
the h/w is wired and make the DT reflect that.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20251216180136.2794105-2-robh@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
arm64: dts: cavium: thunder2: Add missing PL011 "uartclk" 2025-07-03T14:29:45+00:00 Rob Herring (Arm) robh@kernel.org 2025-06-09T21:57:06+00:00 0d495db1b9bd4c3eefc201c5e1c92fd1b96ecf2e The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The Thunder2 SoC is missing the core "uartclk". In this case, the Linux driver uses single clock for both clock inputs. Let's assume that's how the h/w is wired and make the DT reflect that. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250609215706.3009692-2-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> 
The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
Thunder2 SoC is missing the core "uartclk". In this case, the Linux
driver uses single clock for both clock inputs. Let's assume that's how
the h/w is wired and make the DT reflect that.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250609215706.3009692-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arm64: dts: Add/fix /memory node unit-addresses 2024-05-02T12:56:02+00:00 Rob Herring robh@kernel.org 2024-04-30T19:18:54+00:00 5c04a5b065e97dd331dba67da9896897fced3bee '/memory' nodes always have a 'reg' property, and therefore should have a unit-address with just plain hex (i.e. no commas). Fix all the arm64 '/memory' nodes. It's possible that some bootloader depends on /memory (arm32 ATAG to DT code does for example). If so, the memory node should be commented with that requirement. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Chanho Min <chanho.min@lge.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240430191856.874600-2-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> 
'/memory' nodes always have a 'reg' property, and therefore should have
a unit-address with just plain hex (i.e. no commas). Fix all the arm64
'/memory' nodes.

It's possible that some bootloader depends on /memory (arm32 ATAG to DT
code does for example). If so, the memory node should be commented with
that requirement.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Chanho Min <chanho.min@lge.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240430191856.874600-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt 2024-04-29T16:12:53+00:00 Arnd Bergmann arnd@arndb.de 2024-04-29T16:12:53+00:00 631ec374839895f8830eb07e0615b778d1908faf Minor improvements in ARM64 DTS for v6.10 Fixes, which might have practical impact, however things were broken for long enough to justify pushing it regular path: 1. ARM Juno: shorten node names for thermal zones, because Linux drivers have strict limit of 20 characters. 2. HiSilicon: correct size of GIC GICC address space and add missing GICH and GICV spaces, add cache info to properly describe cache topology and solve kernel boot warning. Several cleanups: 1. Use capital "OR" for multiple licenses in SPDX. 2. Correct white-spaces for code readability. 3. Fix W=1 dtc compiler warnings, which should not have practical impact for Amazon, APM, Cavium, Realtek, Socionext Uniphier and Spreadtrum like: - missing unit addresses, - nodes not belonging to soc node, - not using generic node names, - few incorrect unit addresses. * tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: (28 commits) arm64: dts: cavium: thunder2-99xx: drop redundant reg-names arm64: dts: amazon: alpine-v3: correct gic unit addresses arm64: dts: amazon: alpine-v3: drop cache nodes unit addresses arm64: dts: amazon: alpine-v3: add missing io-fabric unit addresses arm64: dts: amazon: alpine-v2: move non-MMIO node out of soc arm64: dts: amazon: alpine-v2: add missing io-fabric unit addresses arm64: dts: apm: shadowcat: move non-MMIO node out of soc arm64: dts: apm: storm: move non-MMIO node out of soc arm64: dts: cavium: correct unit addresses arm64: dts: cavium: move non-MMIO node out of soc arm64: dts: realtek: rtc16xx: add missing unit address to soc node arm64: dts: realtek: rtd139x: add missing unit address to soc node arm64: dts: realtek: rtd129x: add missing unit address to soc node arm64: dts: uniphier: ld20-global: drop audio codec port unit address arm64: dts: uniphier: ld20-global: use generic node name for audio-codec arm64: dts: uniphier: ld11-global: drop audio codec port unit address arm64: dts: uniphier: ld11-global: use generic node name for audio-codec arm64: dts: sharkl3: add missing unit addresses arm64: dts: whale2: add missing ap-apb unit address arm64: dts: sc9860: move GIC to soc node ... Signed-off-by: Arnd Bergmann <arnd@arndb.de> 
Minor improvements in ARM64 DTS for v6.10

Fixes, which might have practical impact, however things were broken for
long enough to justify pushing it regular path:
1. ARM Juno: shorten node names for thermal zones, because Linux drivers
   have strict limit of 20 characters.
2. HiSilicon: correct size of GIC GICC address space and add missing
   GICH and GICV spaces, add cache info to properly describe cache
   topology and solve kernel boot warning.

Several cleanups:
1. Use capital "OR" for multiple licenses in SPDX.
2. Correct white-spaces for code readability.
3. Fix W=1 dtc compiler warnings, which should not have practical
   impact for Amazon, APM, Cavium, Realtek, Socionext Uniphier and
   Spreadtrum like:
    - missing unit addresses,
    - nodes not belonging to soc node,
    - not using generic node names,
    - few incorrect unit addresses.

* tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: (28 commits)
  arm64: dts: cavium: thunder2-99xx: drop redundant reg-names
  arm64: dts: amazon: alpine-v3: correct gic unit addresses
  arm64: dts: amazon: alpine-v3: drop cache nodes unit addresses
  arm64: dts: amazon: alpine-v3: add missing io-fabric unit addresses
  arm64: dts: amazon: alpine-v2: move non-MMIO node out of soc
  arm64: dts: amazon: alpine-v2: add missing io-fabric unit addresses
  arm64: dts: apm: shadowcat: move non-MMIO node out of soc
  arm64: dts: apm: storm: move non-MMIO node out of soc
  arm64: dts: cavium: correct unit addresses
  arm64: dts: cavium: move non-MMIO node out of soc
  arm64: dts: realtek: rtc16xx: add missing unit address to soc node
  arm64: dts: realtek: rtd139x: add missing unit address to soc node
  arm64: dts: realtek: rtd129x: add missing unit address to soc node
  arm64: dts: uniphier: ld20-global: drop audio codec port unit address
  arm64: dts: uniphier: ld20-global: use generic node name for audio-codec
  arm64: dts: uniphier: ld11-global: drop audio codec port unit address
  arm64: dts: uniphier: ld11-global: use generic node name for audio-codec
  arm64: dts: sharkl3: add missing unit addresses
  arm64: dts: whale2: add missing ap-apb unit address
  arm64: dts: sc9860: move GIC to soc node
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arm/arm64: dts: Drop "arm,armv8-pmuv3" compatible usage 2024-04-29T08:27:52+00:00 Rob Herring robh@kernel.org 2024-04-17T20:38:47+00:00 8b40a46966d294bc64bad0feb13d3304fde738f2 The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily, it doesn't provide any detail on uarch specific events. There's still remaining cases for CPUs without any corresponding PMU definition and for big.LITTLE systems which only have a single PMU node (there should be one per core type). Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Bjorn Andersson <andersson@kernel.org> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Acked-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Link: https://lore.kernel.org/r/20240417203853.3212103-1-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> 
The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily,
it doesn't provide any detail on uarch specific events.

There's still remaining cases for CPUs without any corresponding PMU
definition and for big.LITTLE systems which only have a single PMU node
(there should be one per core type).

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Acked-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Link: https://lore.kernel.org/r/20240417203853.3212103-1-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arm64: dts: cavium: thunder2-99xx: drop redundant reg-names 2024-04-24T07:23:56+00:00 Krzysztof Kozlowski krzysztof.kozlowski@linaro.org 2024-04-07T10:28:41+00:00 de2ba5bd3607a5e5442a5fcbdea6ee2823b72fb9 There is no "reg-names" property in the PCI bindings and the value does not conform to Devicetree coding style (upper-case letters, space), so assume this was copied from downstream. This fixes dtbs_check warning: thunder2-99xx.dtb: pcie@30000000: Unevaluated properties are not allowed ('reg-names' was unexpected) Link: https://lore.kernel.org/r/20240407102841.38617-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 
There is no "reg-names" property in the PCI bindings and the value does
not conform to Devicetree coding style (upper-case letters, space), so
assume this was copied from downstream.

This fixes dtbs_check warning:

  thunder2-99xx.dtb: pcie@30000000: Unevaluated properties are not allowed ('reg-names' was unexpected)

Link: https://lore.kernel.org/r/20240407102841.38617-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arm64: dts: cavium: correct unit addresses 2024-04-24T07:23:53+00:00 Krzysztof Kozlowski krzk@kernel.org 2024-04-02T19:41:29+00:00 74f65c57ea1fbfa7de0bb39f32e85583dee20f3c Correct several nodes' unit addresses to fix dtc W=1 warnings: thunder-88xx.dtsi:381.44-398.5: Warning (simple_bus_reg): /soc/interrupt-controller@8010,00000000: simple-bus unit address format error, expected "801000000000" thunder-88xx.dtsi:400.30-406.5: Warning (simple_bus_reg): /soc/serial@87e0,24000000: simple-bus unit address format error, expected "87e024000000" thunder-88xx.dtsi:408.30-414.5: Warning (simple_bus_reg): /soc/serial@87e0,25000000: simple-bus unit address format error, expected "87e025000000" Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240402194129.69481-2-krzk@kernel.org 
Correct several nodes' unit addresses to fix dtc W=1 warnings:

  thunder-88xx.dtsi:381.44-398.5: Warning (simple_bus_reg): /soc/interrupt-controller@8010,00000000: simple-bus unit address format error, expected "801000000000"
  thunder-88xx.dtsi:400.30-406.5: Warning (simple_bus_reg): /soc/serial@87e0,24000000: simple-bus unit address format error, expected "87e024000000"
  thunder-88xx.dtsi:408.30-414.5: Warning (simple_bus_reg): /soc/serial@87e0,25000000: simple-bus unit address format error, expected "87e025000000"

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240402194129.69481-2-krzk@kernel.org
arm64: dts: cavium: move non-MMIO node out of soc 2024-04-24T07:23:53+00:00 Krzysztof Kozlowski krzk@kernel.org 2024-04-02T19:41:28+00:00 d2377018b01d33265d8908db074b4cdfaaaae26b Non-MMIO devices, which are BTW not really part of the SoC, should not be within simple-bus, as reported by dtc W=1 warning: thunder-88xx.dtsi:374.28-379.5: Warning (simple_bus_reg): /soc/refclk50mhz: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240402194129.69481-1-krzk@kernel.org 
Non-MMIO devices, which are BTW not really part of the SoC, should not
be within simple-bus, as reported by dtc W=1 warning:

  thunder-88xx.dtsi:374.28-379.5: Warning (simple_bus_reg): /soc/refclk50mhz: missing or empty reg/ranges property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240402194129.69481-1-krzk@kernel.org
arm64: dts: cavium: Fix GICv3 ITS nodes 2023-03-17T12:39:00+00:00 Rob Herring robh@kernel.org 2023-02-08T18:55:06+00:00 d2e5c16f6c86901040f3bb6b40d1a01ccf1a21b0 The GICv3 ITS is an MSI controller, therefore its node name should be 'msi-controller'. The ITS node is also expected to have '#msi-cells'. Add it on Thunder as there are no users. Thunder2 uses 'msi-parent', but Robin says that should be 'msi-map' instead and I'm not sure what's correct for it. The unit-addresses of both the ITS and main GIC node on thunder2 are also wrong, so fix them while we're here. Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230208185506.2305349-1-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 
The GICv3 ITS is an MSI controller, therefore its node name should be
'msi-controller'. The ITS node is also expected to have '#msi-cells'.
Add it on Thunder as there are no users. Thunder2 uses 'msi-parent', but
Robin says that should be 'msi-map' instead and I'm not sure what's
correct for it.

The unit-addresses of both the ITS and main GIC node on thunder2 are also
wrong, so fix them while we're here.

Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230208185506.2305349-1-robh@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>