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<title>linux-toradex.git/arch/arm64/boot/dts/cix/Makefile, branch master</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>arm64: dts: cix: Add OrangePi 6 Plus board support</title>
<updated>2026-01-12T01:11:19+00:00</updated>
<author>
<name>Gary Yang</name>
<email>gary.yang@cixtech.com</email>
</author>
<published>2026-01-10T09:34:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e39fadd6ef7b797e1db7bb7bf2ed9a1784632a8b'/>
<id>e39fadd6ef7b797e1db7bb7bf2ed9a1784632a8b</id>
<content type='text'>
OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit
processor + NPU processor,integrated graphics processor, equipped with
16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe
SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write
and high-capacity storage

Signed-off-by: Gary Yang &lt;gary.yang@cixtech.com&gt;
Link: https://lore.kernel.org/r/20260110093406.2700505-3-gary.yang@cixtech.com
Signed-off-by: Peter Chen &lt;peter.chen@cixtech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit
processor + NPU processor,integrated graphics processor, equipped with
16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe
SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write
and high-capacity storage

Signed-off-by: Gary Yang &lt;gary.yang@cixtech.com&gt;
Link: https://lore.kernel.org/r/20260110093406.2700505-3-gary.yang@cixtech.com
Signed-off-by: Peter Chen &lt;peter.chen@cixtech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: cix: Add sky1 base dts initial support</title>
<updated>2025-07-21T15:14:55+00:00</updated>
<author>
<name>Peter Chen</name>
<email>peter.chen@cixtech.com</email>
</author>
<published>2025-07-21T14:44:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=80be23bb20eab1a89cf585b3bdee0e257d23f5e0'/>
<id>80be23bb20eab1a89cf585b3bdee0e257d23f5e0</id>
<content type='text'>
CIX SKY1 SoC is high performance Armv9 SoC designed by Cixtech,
and Orion O6 is the motherboard launched by Radxa. See below for
detail:
https://docs.radxa.com/en/orion/o6/getting-started/introduction

In this commit, it only adds limited components for running initramfs
at Orion O6.

Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Tested-by: Enric Balletbo i Serra &lt;eballetb@redhat.com&gt;
Tested-by: Kajetan Puchalski &lt;kajetan.puchalski@arm.com&gt;
Signed-off-by: Peter Chen &lt;peter.chen@cixtech.com&gt;
Signed-off-by: Guomin Chen &lt;Guomin.Chen@cixtech.com&gt;
Signed-off-by: Gary Yang &lt;gary.yang@cixtech.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CIX SKY1 SoC is high performance Armv9 SoC designed by Cixtech,
and Orion O6 is the motherboard launched by Radxa. See below for
detail:
https://docs.radxa.com/en/orion/o6/getting-started/introduction

In this commit, it only adds limited components for running initramfs
at Orion O6.

Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Tested-by: Enric Balletbo i Serra &lt;eballetb@redhat.com&gt;
Tested-by: Kajetan Puchalski &lt;kajetan.puchalski@arm.com&gt;
Signed-off-by: Peter Chen &lt;peter.chen@cixtech.com&gt;
Signed-off-by: Guomin Chen &lt;Guomin.Chen@cixtech.com&gt;
Signed-off-by: Gary Yang &lt;gary.yang@cixtech.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
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