<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/arm64/boot/dts/realtek, branch master</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>arm64: dts: realtek: Add Kent SoC and EVB device trees</title>
<updated>2026-01-28T22:33:50+00:00</updated>
<author>
<name>Yu-Chun Lin</name>
<email>eleanor.lin@realtek.com</email>
</author>
<published>2026-01-27T07:14:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b095c27fc874ef5e26a025a0ddbdacfc3c94d663'/>
<id>b095c27fc874ef5e26a025a0ddbdacfc3c94d663</id>
<content type='text'>
Add Device Tree hierarchy for Realtek Kent SoC family:

- kent.dtsi: base SoC layer
- rtd&lt;variant&gt;.dtsi: SoC variant layer
- rtd&lt;variant&gt;-&lt;board&gt;.dtsi: board layer
- rtd&lt;variant&gt;-&lt;board&gt;-&lt;config&gt;.dts: board configuration layer

Include RTD1501s Phantom EVB (8GB), RTD1861B Krypton EVB (8GB), and
RTD1920s Smallville EVB (4GB).

Signed-off-by: Yu-Chun Lin &lt;eleanor.lin@realtek.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20260127071530.25426-3-eleanor15x@gmail.com
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add Device Tree hierarchy for Realtek Kent SoC family:

- kent.dtsi: base SoC layer
- rtd&lt;variant&gt;.dtsi: SoC variant layer
- rtd&lt;variant&gt;-&lt;board&gt;.dtsi: board layer
- rtd&lt;variant&gt;-&lt;board&gt;-&lt;config&gt;.dts: board configuration layer

Include RTD1501s Phantom EVB (8GB), RTD1861B Krypton EVB (8GB), and
RTD1920s Smallville EVB (4GB).

Signed-off-by: Yu-Chun Lin &lt;eleanor.lin@realtek.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20260127071530.25426-3-eleanor15x@gmail.com
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt</title>
<updated>2024-04-29T16:12:53+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2024-04-29T16:12:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=631ec374839895f8830eb07e0615b778d1908faf'/>
<id>631ec374839895f8830eb07e0615b778d1908faf</id>
<content type='text'>
Minor improvements in ARM64 DTS for v6.10

Fixes, which might have practical impact, however things were broken for
long enough to justify pushing it regular path:
1. ARM Juno: shorten node names for thermal zones, because Linux drivers
   have strict limit of 20 characters.
2. HiSilicon: correct size of GIC GICC address space and add missing
   GICH and GICV spaces, add cache info to properly describe cache
   topology and solve kernel boot warning.

Several cleanups:
1. Use capital "OR" for multiple licenses in SPDX.
2. Correct white-spaces for code readability.
3. Fix W=1 dtc compiler warnings, which should not have practical
   impact for Amazon, APM, Cavium, Realtek, Socionext Uniphier and
   Spreadtrum like:
    - missing unit addresses,
    - nodes not belonging to soc node,
    - not using generic node names,
    - few incorrect unit addresses.

* tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: (28 commits)
  arm64: dts: cavium: thunder2-99xx: drop redundant reg-names
  arm64: dts: amazon: alpine-v3: correct gic unit addresses
  arm64: dts: amazon: alpine-v3: drop cache nodes unit addresses
  arm64: dts: amazon: alpine-v3: add missing io-fabric unit addresses
  arm64: dts: amazon: alpine-v2: move non-MMIO node out of soc
  arm64: dts: amazon: alpine-v2: add missing io-fabric unit addresses
  arm64: dts: apm: shadowcat: move non-MMIO node out of soc
  arm64: dts: apm: storm: move non-MMIO node out of soc
  arm64: dts: cavium: correct unit addresses
  arm64: dts: cavium: move non-MMIO node out of soc
  arm64: dts: realtek: rtc16xx: add missing unit address to soc node
  arm64: dts: realtek: rtd139x: add missing unit address to soc node
  arm64: dts: realtek: rtd129x: add missing unit address to soc node
  arm64: dts: uniphier: ld20-global: drop audio codec port unit address
  arm64: dts: uniphier: ld20-global: use generic node name for audio-codec
  arm64: dts: uniphier: ld11-global: drop audio codec port unit address
  arm64: dts: uniphier: ld11-global: use generic node name for audio-codec
  arm64: dts: sharkl3: add missing unit addresses
  arm64: dts: whale2: add missing ap-apb unit address
  arm64: dts: sc9860: move GIC to soc node
  ...

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Minor improvements in ARM64 DTS for v6.10

Fixes, which might have practical impact, however things were broken for
long enough to justify pushing it regular path:
1. ARM Juno: shorten node names for thermal zones, because Linux drivers
   have strict limit of 20 characters.
2. HiSilicon: correct size of GIC GICC address space and add missing
   GICH and GICV spaces, add cache info to properly describe cache
   topology and solve kernel boot warning.

Several cleanups:
1. Use capital "OR" for multiple licenses in SPDX.
2. Correct white-spaces for code readability.
3. Fix W=1 dtc compiler warnings, which should not have practical
   impact for Amazon, APM, Cavium, Realtek, Socionext Uniphier and
   Spreadtrum like:
    - missing unit addresses,
    - nodes not belonging to soc node,
    - not using generic node names,
    - few incorrect unit addresses.

* tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: (28 commits)
  arm64: dts: cavium: thunder2-99xx: drop redundant reg-names
  arm64: dts: amazon: alpine-v3: correct gic unit addresses
  arm64: dts: amazon: alpine-v3: drop cache nodes unit addresses
  arm64: dts: amazon: alpine-v3: add missing io-fabric unit addresses
  arm64: dts: amazon: alpine-v2: move non-MMIO node out of soc
  arm64: dts: amazon: alpine-v2: add missing io-fabric unit addresses
  arm64: dts: apm: shadowcat: move non-MMIO node out of soc
  arm64: dts: apm: storm: move non-MMIO node out of soc
  arm64: dts: cavium: correct unit addresses
  arm64: dts: cavium: move non-MMIO node out of soc
  arm64: dts: realtek: rtc16xx: add missing unit address to soc node
  arm64: dts: realtek: rtd139x: add missing unit address to soc node
  arm64: dts: realtek: rtd129x: add missing unit address to soc node
  arm64: dts: uniphier: ld20-global: drop audio codec port unit address
  arm64: dts: uniphier: ld20-global: use generic node name for audio-codec
  arm64: dts: uniphier: ld11-global: drop audio codec port unit address
  arm64: dts: uniphier: ld11-global: use generic node name for audio-codec
  arm64: dts: sharkl3: add missing unit addresses
  arm64: dts: whale2: add missing ap-apb unit address
  arm64: dts: sc9860: move GIC to soc node
  ...

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm/arm64: dts: Drop "arm,armv8-pmuv3" compatible usage</title>
<updated>2024-04-29T08:27:52+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2024-04-17T20:38:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8b40a46966d294bc64bad0feb13d3304fde738f2'/>
<id>8b40a46966d294bc64bad0feb13d3304fde738f2</id>
<content type='text'>
The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily,
it doesn't provide any detail on uarch specific events.

There's still remaining cases for CPUs without any corresponding PMU
definition and for big.LITTLE systems which only have a single PMU node
(there should be one per core type).

Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Jisheng Zhang &lt;jszhang@kernel.org&gt;
Acked-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Acked-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;
Acked-by: Alim Akhtar &lt;alim.akhtar@samsung.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
Link: https://lore.kernel.org/r/20240417203853.3212103-1-robh@kernel.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily,
it doesn't provide any detail on uarch specific events.

There's still remaining cases for CPUs without any corresponding PMU
definition and for big.LITTLE systems which only have a single PMU node
(there should be one per core type).

Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Jisheng Zhang &lt;jszhang@kernel.org&gt;
Acked-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Acked-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;
Acked-by: Alim Akhtar &lt;alim.akhtar@samsung.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
Link: https://lore.kernel.org/r/20240417203853.3212103-1-robh@kernel.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: realtek: rtc16xx: add missing unit address to soc node</title>
<updated>2024-04-24T06:50:27+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2024-04-01T14:09:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bd54eff2c5272efeb91d37efd4d1af9270601028'/>
<id>bd54eff2c5272efeb91d37efd4d1af9270601028</id>
<content type='text'>
"soc" node has "ranges" property thus add matching unit address to fix
dtc W=1 warnings:

  rtd16xx.dtsi:130.6-198.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20240401140912.97157-3-krzk@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
"soc" node has "ranges" property thus add matching unit address to fix
dtc W=1 warnings:

  rtd16xx.dtsi:130.6-198.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20240401140912.97157-3-krzk@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: realtek: rtd139x: add missing unit address to soc node</title>
<updated>2024-04-24T06:50:27+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2024-04-01T14:09:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ed719eaa59f8bb0354dde2e37ece3e05239d0b1d'/>
<id>ed719eaa59f8bb0354dde2e37ece3e05239d0b1d</id>
<content type='text'>
"soc" node has "ranges" property thus add matching unit address to fix
dtc W=1 warnings:

  rtd139x.dtsi:50.6-120.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20240401140912.97157-2-krzk@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
"soc" node has "ranges" property thus add matching unit address to fix
dtc W=1 warnings:

  rtd139x.dtsi:50.6-120.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20240401140912.97157-2-krzk@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: realtek: rtd129x: add missing unit address to soc node</title>
<updated>2024-04-24T06:50:26+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2024-04-01T14:09:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9c1998bb182d7edbddf8bef66f87ea68f8b91d67'/>
<id>9c1998bb182d7edbddf8bef66f87ea68f8b91d67</id>
<content type='text'>
"soc" node has "ranges" property thus add matching unit address to fix
dtc W=1 warnings:

  rtd129x.dtsi:51.6-122.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20240401140912.97157-1-krzk@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
"soc" node has "ranges" property thus add matching unit address to fix
dtc W=1 warnings:

  rtd129x.dtsi:51.6-122.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Link: https://lore.kernel.org/r/20240401140912.97157-1-krzk@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: realtek: add missing cache properties</title>
<updated>2023-05-16T16:29:24+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2023-04-21T22:31:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7a242135a44d32a6a8563fc74f11d5a100b7cf0a'/>
<id>7a242135a44d32a6a8563fc74f11d5a100b7cf0a</id>
<content type='text'>
As all level 2 and level 3 caches are unified, add required
cache-unified and cache-level properties to fix warnings like:

  rtd1293-ds418j.dtb: l2-cache: 'cache-level' is a required property
  rtd1293-ds418j.dtb: l2-cache: 'cache-unified' is a required property

Link: https://lore.kernel.org/r/20230421223151.115243-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As all level 2 and level 3 caches are unified, add required
cache-unified and cache-level properties to fix warnings like:

  rtd1293-ds418j.dtb: l2-cache: 'cache-level' is a required property
  rtd1293-ds418j.dtb: l2-cache: 'cache-unified' is a required property

Link: https://lore.kernel.org/r/20230421223151.115243-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: realtek: align UART node name with bindings</title>
<updated>2023-01-27T09:44:05+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2023-01-23T15:15:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5ad30c5fc0a72c2aaa1d26f9e4061d8646231adb'/>
<id>5ad30c5fc0a72c2aaa1d26f9e4061d8646231adb</id>
<content type='text'>
Bindings expect UART/serial node names to be "serial".

Link: https://lore.kernel.org/r/20230123151514.369101-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Bindings expect UART/serial node names to be "serial".

Link: https://lore.kernel.org/r/20230123151514.369101-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: realtek: rtd16xx: Add SB2 and SCPU Wrapper syscon nodes</title>
<updated>2020-04-12T21:59:30+00:00</updated>
<author>
<name>Andreas Färber</name>
<email>afaerber@suse.de</email>
</author>
<published>2019-11-25T06:45:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e624119013bf4f10df233d2534c91eab9642911d'/>
<id>e624119013bf4f10df233d2534c91eab9642911d</id>
<content type='text'>
Add syscon mfd nodes for SB2 and SCPU Wrapper to RTD16xx DT.

Acked-by: James Tai &lt;james.tai@realtek.com&gt;
Signed-off-by: Andreas Färber &lt;afaerber@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add syscon mfd nodes for SB2 and SCPU Wrapper to RTD16xx DT.

Acked-by: James Tai &lt;james.tai@realtek.com&gt;
Signed-off-by: Andreas Färber &lt;afaerber@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: realtek: rtd139x: Add SB2 and SCPU Wrapper syscon nodes</title>
<updated>2020-04-12T21:59:29+00:00</updated>
<author>
<name>Andreas Färber</name>
<email>afaerber@suse.de</email>
</author>
<published>2019-11-25T06:42:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=dd473726dc799a1a62d687fb2a6aa5c55815f061'/>
<id>dd473726dc799a1a62d687fb2a6aa5c55815f061</id>
<content type='text'>
Add syscon mfd nodes for SB2 and SCPU Wrapper to RTD139x DT.

Acked-by: James Tai &lt;james.tai@realtek.com&gt;
Signed-off-by: Andreas Färber &lt;afaerber@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add syscon mfd nodes for SB2 and SCPU Wrapper to RTD139x DT.

Acked-by: James Tai &lt;james.tai@realtek.com&gt;
Signed-off-by: Andreas Färber &lt;afaerber@suse.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
