<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/arm64/boot/dts/ti, branch master</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>arm64: dts: ti: k3: Use memory-region-names for r5f</title>
<updated>2026-04-09T11:35:28+00:00</updated>
<author>
<name>Markus Schneider-Pargmann (TI)</name>
<email>msp@baylibre.com</email>
</author>
<published>2026-03-18T15:13:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=abe76f9f47d59ff80eb2fc59482aa76bbf6fd13a'/>
<id>abe76f9f47d59ff80eb2fc59482aa76bbf6fd13a</id>
<content type='text'>
Add the newly introduced memory-region-names to all occurences of
ti,*-r5f. This helps adding a name to each memory-region so it is
easier to see what memory regions are for.

Signed-off-by: Markus Schneider-Pargmann (TI) &lt;msp@baylibre.com&gt;
Link: https://patch.msgid.link/20260318-topic-am62a-ioddr-dt-v6-19-v3-3-c41473cb23c3@baylibre.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the newly introduced memory-region-names to all occurences of
ti,*-r5f. This helps adding a name to each memory-region so it is
easier to see what memory regions are for.

Signed-off-by: Markus Schneider-Pargmann (TI) &lt;msp@baylibre.com&gt;
Link: https://patch.msgid.link/20260318-topic-am62a-ioddr-dt-v6-19-v3-3-c41473cb23c3@baylibre.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-pinctrl: sort shift values numerically</title>
<updated>2026-03-27T14:25:06+00:00</updated>
<author>
<name>Rasmus Villemoes</name>
<email>linux@rasmusvillemoes.dk</email>
</author>
<published>2026-03-27T14:15:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=47c806de9e9cf171d197f2f0df86df7f2bd1aa56'/>
<id>47c806de9e9cf171d197f2f0df86df7f2bd1aa56</id>
<content type='text'>
The macros are easier to read when the values are sorted numerically.

Signed-off-by: Rasmus Villemoes &lt;linux@rasmusvillemoes.dk&gt;
Link: https://patch.msgid.link/20260327141513.1250499-3-linux@rasmusvillemoes.dk
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The macros are easier to read when the values are sorted numerically.

Signed-off-by: Rasmus Villemoes &lt;linux@rasmusvillemoes.dk&gt;
Link: https://patch.msgid.link/20260327141513.1250499-3-linux@rasmusvillemoes.dk
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-pinctrl: consistently use tabs for alignment</title>
<updated>2026-03-27T14:25:06+00:00</updated>
<author>
<name>Rasmus Villemoes</name>
<email>linux@rasmusvillemoes.dk</email>
</author>
<published>2026-03-27T14:15:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=51ccf3e4628594c6b865a0d7e1363b0799555ab7'/>
<id>51ccf3e4628594c6b865a0d7e1363b0799555ab7</id>
<content type='text'>
Currently, there's a mix of spaces and tabs used for aligning the
bodies of the macros, even within the same block. Use tabs throughout
for consistency.

No functional change; 'git diff -w' produces no output.

Signed-off-by: Rasmus Villemoes &lt;linux@rasmusvillemoes.dk&gt;
Link: https://patch.msgid.link/20260327141513.1250499-2-linux@rasmusvillemoes.dk
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently, there's a mix of spaces and tabs used for aligning the
bodies of the macros, even within the same block. Use tabs throughout
for consistency.

No functional change; 'git diff -w' produces no output.

Signed-off-by: Rasmus Villemoes &lt;linux@rasmusvillemoes.dk&gt;
Link: https://patch.msgid.link/20260327141513.1250499-2-linux@rasmusvillemoes.dk
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-am642-evm: Add ICSSG0 overlay for dual EMAC support</title>
<updated>2026-03-27T05:54:53+00:00</updated>
<author>
<name>Meghana Malladi</name>
<email>m-malladi@ti.com</email>
</author>
<published>2026-03-23T09:03:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8bafdf5dd89b961b698d8bd2cfcebc8e4d3764fd'/>
<id>8bafdf5dd89b961b698d8bd2cfcebc8e4d3764fd</id>
<content type='text'>
Add device tree overlay to enable ICSSG0 dual EMAC support on AM642 EVM.
This overlay enables both ICSSG0 Ethernet interfaces (port0 and port1) in
dual EMAC mode.

Users can combine this with the existing ICSSG1 overlay to enable all four
ICSSG interfaces if needed.

Signed-off-by: Meghana Malladi &lt;m-malladi@ti.com&gt;
Link: https://patch.msgid.link/20260323090358.632329-2-m-malladi@ti.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add device tree overlay to enable ICSSG0 dual EMAC support on AM642 EVM.
This overlay enables both ICSSG0 Ethernet interfaces (port0 and port1) in
dual EMAC mode.

Users can combine this with the existing ICSSG1 overlay to enable all four
ICSSG interfaces if needed.

Signed-off-by: Meghana Malladi &lt;m-malladi@ti.com&gt;
Link: https://patch.msgid.link/20260323090358.632329-2-m-malladi@ti.com
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-am62p-verdin: Add Zinnia</title>
<updated>2026-03-27T05:54:53+00:00</updated>
<author>
<name>Francesco Dolcini</name>
<email>francesco.dolcini@toradex.com</email>
</author>
<published>2026-03-24T09:37:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=71c2a8124527a19af06b8d0f5061701d851e15bb'/>
<id>71c2a8124527a19af06b8d0f5061701d851e15bb</id>
<content type='text'>
Add Zinnia Carrier Board mated with Verdin AM62P.

It features 1 x RS232, 1 x RS485, 1 x CAN, 3 x isolated digital I/O,
2 x 1GBit/s Ethernet, a mini PCIe slot with USB / SIM card connector
for a modem, USB and SD card interfaces.

Link: https://www.toradex.com/products/carrier-board/zinnia-carrier-board
Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-8-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add Zinnia Carrier Board mated with Verdin AM62P.

It features 1 x RS232, 1 x RS485, 1 x CAN, 3 x isolated digital I/O,
2 x 1GBit/s Ethernet, a mini PCIe slot with USB / SIM card connector
for a modem, USB and SD card interfaces.

Link: https://www.toradex.com/products/carrier-board/zinnia-carrier-board
Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-8-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-am62p-verdin: Add SPI_1_CS as GPIO</title>
<updated>2026-03-27T05:54:52+00:00</updated>
<author>
<name>Francesco Dolcini</name>
<email>francesco.dolcini@toradex.com</email>
</author>
<published>2026-03-24T09:37:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=15da9d2915d0ce705538052edf9552f37c253263'/>
<id>15da9d2915d0ce705538052edf9552f37c253263</id>
<content type='text'>
Add a pinctrl to use SPI_1 CS as GPIO.

Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-7-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a pinctrl to use SPI_1 CS as GPIO.

Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-7-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-am62p-verdin: Split UART_2 pinctrl group</title>
<updated>2026-03-27T05:54:52+00:00</updated>
<author>
<name>Francesco Dolcini</name>
<email>francesco.dolcini@toradex.com</email>
</author>
<published>2026-03-24T09:37:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cbbda853615f09ca9c9f92efd8b75393a94c988a'/>
<id>cbbda853615f09ca9c9f92efd8b75393a94c988a</id>
<content type='text'>
Some carrier board reuse the UART_2 control signals as GPIO, split
the pinctrl RTS/CTS in separated nodes to maximize flexibility.

Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-6-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some carrier board reuse the UART_2 control signals as GPIO, split
the pinctrl RTS/CTS in separated nodes to maximize flexibility.

Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-6-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-am62-verdin: Add Zinnia</title>
<updated>2026-03-27T05:54:52+00:00</updated>
<author>
<name>Francesco Dolcini</name>
<email>francesco.dolcini@toradex.com</email>
</author>
<published>2026-03-24T09:36:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4abc2f22e469d8ebcf56e334d2223095cd472f26'/>
<id>4abc2f22e469d8ebcf56e334d2223095cd472f26</id>
<content type='text'>
Add Zinnia Carrier Board mated with Verdin AM62.

It features 1 x RS232, 1 x RS485, 1 x CAN, 3 x isolated digital I/O,
2 x 1GBit/s Ethernet, a mini PCIe slot with USB / SIM card connector
for a modem, USB and SD card interfaces.

Link: https://www.toradex.com/products/carrier-board/zinnia-carrier-board
Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-5-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add Zinnia Carrier Board mated with Verdin AM62.

It features 1 x RS232, 1 x RS485, 1 x CAN, 3 x isolated digital I/O,
2 x 1GBit/s Ethernet, a mini PCIe slot with USB / SIM card connector
for a modem, USB and SD card interfaces.

Link: https://www.toradex.com/products/carrier-board/zinnia-carrier-board
Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-5-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-am62-verdin: Split UART_2 pinctrl group</title>
<updated>2026-03-27T05:54:45+00:00</updated>
<author>
<name>Francesco Dolcini</name>
<email>francesco.dolcini@toradex.com</email>
</author>
<published>2026-03-24T09:36:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=903c29493e6a0c5d9d34d13e162fb2ce6182d88b'/>
<id>903c29493e6a0c5d9d34d13e162fb2ce6182d88b</id>
<content type='text'>
Some carrier board reuse the UART_2 control signals as GPIO, split
the pinctrl RTS/CTS in separated nodes to maximize flexibility.

Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-4-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some carrier board reuse the UART_2 control signals as GPIO, split
the pinctrl RTS/CTS in separated nodes to maximize flexibility.

Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-4-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: ti: k3-am62-verdin: Fix SPI_1 GPIO CS pinctrl label</title>
<updated>2026-03-27T05:54:27+00:00</updated>
<author>
<name>Francesco Dolcini</name>
<email>francesco.dolcini@toradex.com</email>
</author>
<published>2026-03-24T09:36:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=944dffaec1ef0f21c203728de77b5618ed70df6e'/>
<id>944dffaec1ef0f21c203728de77b5618ed70df6e</id>
<content type='text'>
Fix SPI_1_CS GPIO pinmux label, this is spi1_cs, not qspi1_io4.

There are no user of this label yet, therefore this change does not
create any compatibility issue.

Fixes: fcb335934c51 ("arm64: dts: ti: verdin-am62: Improve spi1 chip-select pinctrl")
Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-3-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix SPI_1_CS GPIO pinmux label, this is spi1_cs, not qspi1_io4.

There are no user of this label yet, therefore this change does not
create any compatibility issue.

Fixes: fcb335934c51 ("arm64: dts: ti: verdin-am62: Improve spi1 chip-select pinctrl")
Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Link: https://patch.msgid.link/20260324093705.26730-3-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
