linux-toradex.git/arch/arm64/include/asm/pgtable.h, branch v4.3.2

arm64: Fix THP protection change logic

2015-10-01T17:02:21+00:00

6910fa1 ("arm64: enable PTE type bit in the mask for pte_modify") fixes
a problem whereby a large block of PROT_NONE mapped memory is
incorrectly mapped as block descriptors when mprotect is called.

Unfortunately, a subtle bug was introduced by this fix to the THP logic.

If one mmaps a large block of memory, then faults it such that it is
collapsed into THPs; resulting calls to mprotect on this area of memory
will lead to incorrect table descriptors being written instead of block
descriptors. This is because pmd_modify calls pte_modify which is now
allowed to modify the type of the page table entry.

This patch reverts commit 6910fa16dbe142f6a0fd0fd7c249f9883ff7fc8a, and
fixes the problem it was trying to address by adjusting PAGE_NONE to
represent a table entry. Thus no change in pte type is required when
moving from PROT_NONE to a different protection.

Fixes: 6910fa16dbe1 ("arm64: enable PTE type bit in the mask for pte_modify")
Cc:  # 4.0+
Cc: Feng Kan 
Reported-by: Ganapatrao Kulkarni 
Tested-by: Ganapatrao Kulkarni 
Reviewed-by: Catalin Marinas 
Signed-off-by: Steve Capper 
Signed-off-by: Catalin Marinas

arm64: pgtable: use a single bit for PTE_WRITE regardless of DBM

2015-09-14T11:28:45+00:00

Depending on CONFIG_ARM64_HW_AFDBM, we use either bit 57 or 51 of the
pte to represent PTE_WRITE. Given that bit 51 is reserved prior to
ARMv8.1, we can just use that bit regardless of the config option. That
also matches what happens if a kernel configured with ARM64_HW_AFDBM=y
is run on a CPU without the DBM functionality.

Cc: Julien Grall 
Tested-by: Julien Grall 
Signed-off-by: Will Deacon

arm64: Fix pte_modify() to preserve the hardware dirty information

2015-09-14T11:28:41+00:00

The pte_modify() function with hardware AF/DBM enabled must transfer the
hardware dirty information to the software PTE_DIRTY bit. However, it
was setting this bit in newprot and the mask does not cover such bit.
This patch sets PTE_DIRTY on the original pte which will be preserved in
the returned value.

Fixes: 2f4b829c625e ("arm64: Add support for hardware updates of the access and dirty pte bits")
Cc: Julien Grall 
Tested-by: Julien Grall 
Tested-by: Will Deacon 
Signed-off-by: Catalin Marinas 
Signed-off-by: Will Deacon

arm64: Fix the pte_hw_dirty() check when AF/DBM is enabled

2015-09-14T11:28:31+00:00

Commit 2f4b829c625e ("arm64: Add support for hardware updates of the
access and dirty pte bits") introduced support for handling hardware
updates of the access flag and dirty status. The PTE is automatically
dirtied in hardware (if supported) by clearing the PTE_RDONLY bit when
the PTE_DBM/PTE_WRITE bit is set. The pte_hw_dirty() macro was added to
detect a hardware dirtied pte. The pte_dirty() macro checks for both
software PTE_DIRTY and pte_hw_dirty().

Functions like pte_modify() clear the PTE_RDONLY bit since it is meant
to be set in set_pte_at() when written to memory. In such cases,
pte_hw_dirty() would return true even though such pte is clean. This
patch changes pte_hw_dirty() to test the PTE_DBM/PTE_WRITE bit together
with PTE_RDONLY.

Fixes: 2f4b829c625e ("arm64: Add support for hardware updates of the access and dirty pte bits")
Reported-by: Julien Grall 
Tested-by: Julien Grall 
Tested-by: Will Deacon 
Signed-off-by: Catalin Marinas 
Signed-off-by: Will Deacon

arm64: pgtable: fix definition of pte_valid

2015-07-28T15:14:03+00:00

pte_valid should check if the PTE_VALID bit (1 << 0) is set in the pte,
so fix the macro definition to use bitwise & instead of logical &&.

Signed-off-by: Will Deacon

arm64: force CONFIG_SMP=y and remove redundant #ifdefs

2015-07-27T10:08:40+00:00

Nobody seems to be producing !SMP systems anymore, so this is just
becoming a source of kernel bugs, particularly if people want to use
coherent DMA with non-shared pages.

This patch forces CONFIG_SMP=y for arm64, removing a modest amount of
code in the process.

Signed-off-by: Will Deacon

arm64: Add support for hardware updates of the access and dirty pte bits

2015-07-27T10:08:39+00:00

The ARMv8.1 architecture extensions introduce support for hardware
updates of the access and dirty information in page table entries. With
TCR_EL1.HA enabled, when the CPU accesses an address with the PTE_AF bit
cleared in the page table, instead of raising an access flag fault the
CPU sets the actual page table entry bit. To ensure that kernel
modifications to the page tables do not inadvertently revert a change
introduced by hardware updates, the exclusive monitor (ldxr/stxr) is
adopted in the pte accessors.

When TCR_EL1.HD is enabled, a write access to a memory location with the
DBM (Dirty Bit Management) bit set in the corresponding pte
automatically clears the read-only bit (AP[2]). Such DBM bit maps onto
the Linux PTE_WRITE bit and to check whether a writable (DBM set) page
is dirty, the kernel tests the PTE_RDONLY bit. In order to allow
read-only and dirty pages, the kernel needs to preserve the software
dirty bit. The hardware dirty status is transferred to the software
dirty bit in ptep_set_wrprotect() (using load/store exclusive loop) and
pte_modify().

Signed-off-by: Catalin Marinas 
Signed-off-by: Will Deacon

arm64: move update_mmu_cache() into asm/pgtable.h

2015-07-27T10:08:39+00:00

Mark Brown reported an allnoconfig build failure in -next:

  Today's linux-next fails to build an arm64 allnoconfig due to "mm:
  make GUP handle pfn mapping unless FOLL_GET is requested" which
  causes:

  >       arm64-allnoconfig
  > ../mm/gup.c:51:4: error: implicit declaration of function
    'update_mmu_cache' [-Werror=implicit-function-declaration]

Fix the error by moving the function to asm/pgtable.h, as is the case
for most other architectures.

Reported-by: Mark Brown 
Signed-off-by: Will Deacon

arm64: expose number of page table levels on Kconfig level

2015-04-14T23:49:01+00:00

We would want to use number of page table level to define mm_struct.
Let's expose it as CONFIG_PGTABLE_LEVELS.

ARM64_PGTABLE_LEVELS is renamed to PGTABLE_LEVELS and defined before
sourcing init/Kconfig: arch/Kconfig will define default value and it's
sourced from init/Kconfig.

Signed-off-by: Kirill A. Shutemov 
Acked-by: Catalin Marinas 
Cc: Will Deacon 
Tested-by: Guenter Roeck 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

arm64: enable PTE type bit in the mask for pte_modify

2015-02-26T18:30:12+00:00

Caught during Trinity testing. The pte_modify does not allow
modification for PTE type bit. This cause the test to hang
the system. It is found that the PTE can't transit from an
inaccessible page (b00) to a valid page (b11) because the mask
does not allow it. This happens when a big block of mmaped
memory is set the PROT_NONE, then the a small piece is broken
off and set to PROT_WRITE | PROT_READ cause a huge page split.

Signed-off-by: Feng Kan 
Signed-off-by: Catalin Marinas