linux-toradex.git/arch/arm64/include, branch v3.10.56

arm64: ptrace: fix compat hardware watchpoint reporting

2014-10-05T21:54:07+00:00

commit 27d7ff273c2aad37b28f6ff0cab2cfa35b51e648 upstream.

I'm not sure what I was on when I wrote this, but when iterating over
the hardware watchpoint array (hbp_watch_array), our index is off by
ARM_MAX_BRP, so we walk off the end of our thread_struct...

... except, a dodgy condition in the loop means that it never executes
at all (bp cannot be NULL).

This patch fixes the code so that we remove the bp check and use the
correct index for accessing the watchpoint structures.

Signed-off-by: Will Deacon 
Signed-off-by: Greg Kroah-Hartman

arm64: implement TASK_SIZE_OF

2014-07-17T22:58:02+00:00

commit fa2ec3ea10bd377f9d55772b1dab65178425a1a2 upstream.

include/linux/sched.h implements TASK_SIZE_OF as TASK_SIZE if it
is not set by the architecture headers.  TASK_SIZE uses the
current task to determine the size of the virtual address space.
On a 64-bit kernel this will cause reading /proc/pid/pagemap of a
64-bit process from a 32-bit process to return EOF when it reads
past 0xffffffff.

Implement TASK_SIZE_OF exactly the same as TASK_SIZE with
test_tsk_thread_flag instead of test_thread_flag.

Signed-off-by: Colin Cross 
Acked-by: Will Deacon 
Signed-off-by: Catalin Marinas 
Signed-off-by: Greg Kroah-Hartman

arm64: Make DMA coherent and strongly ordered mappings not executable

2014-05-06T14:55:26+00:00

commit de2db7432917a82b62d55bb59635586eeca6d1bd upstream.

pgprot_{dmacoherent,writecombine,noncached} don't need to generate
executable mappings with side-effects like __sync_icache_dcache() being
called when the mapping is in user space.

Signed-off-by: Catalin Marinas 
Reported-by: Bharat Bhushan 
Tested-by: Laura Abbott 
Tested-by: Bharat Bhushan 
Signed-off-by: Greg Kroah-Hartman

arm64: Do not synchronise I and D caches for special ptes

2014-05-06T14:55:26+00:00

commit 71fdb6bf61bf0692f004f9daf5650392c0cfe300 upstream.

Special pte mappings are not intended to be executable and do not even
have an associated struct page. This patch ensures that we do not call
__sync_icache_dcache() on such ptes.

Signed-off-by: Catalin Marinas 
Reported-by: Steve Capper 
Tested-by: Laura Abbott 
Tested-by: Bharat Bhushan 
Signed-off-by: Greg Kroah-Hartman

arm64: add DSB after icache flush in __flush_icache_all()

2014-02-20T19:06:11+00:00

commit 5044bad43ee573d0b6d90e3ccb7a40c2c7d25eb4 upstream.

Add DSB after icache flush to complete the cache maintenance operation.
The function __flush_icache_all() is used only for user space mappings
and an ISB is not required because of an exception return before executing
user instructions. An exception return would behave like an ISB.

Signed-off-by: Vinayak Kale 
Acked-by: Will Deacon 
Signed-off-by: Catalin Marinas 
Signed-off-by: Greg Kroah-Hartman

arm64: Use Normal NonCacheable memory for writecombine

2014-01-09T20:24:27+00:00

commit 4f00130b70e5eee813cc7bc298e0f3fdf79673cc upstream.

This provides better performance compared to Device GRE and also allows
unaligned accesses. Such memory is intended to be used with standard RAM
(e.g. framebuffers) and not I/O.

Signed-off-by: Catalin Marinas 
Cc: Mark Brown 
Signed-off-by: Greg Kroah-Hartman

clocksource: arch_timer: use virtual counters

2014-01-09T20:24:26+00:00

commit 0d651e4e65e96989f72236bf83bd4c6e55eb6ce4 upstream.

Switching between reading the virtual or physical counters is
problematic, as some core code wants a view of time before we're fully
set up. Using a function pointer and switching the source after the
first read can make time appear to go backwards, and having a check in
the read function is an unfortunate block on what we want to be a fast
path.

Instead, this patch makes us always use the virtual counters. If we're a
guest, or don't have hyp mode, we'll use the virtual timers, and as such
don't care about CNTVOFF as long as it doesn't change in such a way as
to make time appear to travel backwards. As the guest will use the
virtual timers, a (potential) KVM host must use the physical timers
(which can wake up the host even if they fire while a guest is
executing), and hence a host must have CNTVOFF set to zero so as to have
a consistent view of time between the physical timers and virtual
counters.

Signed-off-by: Mark Rutland 
Acked-by: Catalin Marinas 
Acked-by: Marc Zyngier 
Acked-by: Santosh Shilimkar 
Cc: Rob Herring 
Cc: Mark Brown 
Signed-off-by: Greg Kroah-Hartman

arm64: check for number of arguments in syscall_get/set_arguments()

2014-01-09T20:24:26+00:00

commit 7b22c03536a539142f931815528d55df455ffe2d upstream.

In ftrace_syscall_enter(),
    syscall_get_arguments(..., 0, n, ...)
        if (i == 0) {  ...; n--;}
        memcpy(..., n * sizeof(args[0]));
If 'number of arguments(n)' is zero and 'argument index(i)' is also zero in
syscall_get_arguments(), none of arguments should be copied by memcpy().
Otherwise 'n--' can be a big positive number and unexpected amount of data
will be copied. Tracing system calls which take no argument, say sync(void),
may hit this case and eventually make the system corrupted.
This patch fixes the issue both in syscall_get_arguments() and
syscall_set_arguments().

Signed-off-by: AKASHI Takahiro 
Acked-by: Will Deacon 
Signed-off-by: Catalin Marinas 
Cc: Mark Brown 
Signed-off-by: Greg Kroah-Hartman

arm64: Change kernel stack size to 16K

2014-01-09T20:24:26+00:00

commit 845ad05ec31e0f3872a321e10dbeaf872022632c upstream.

Written by Catalin Marinas, tested by APM on storm platform. This is needed
because of the failures encountered when running SpecWeb benchmark test.

Signed-off-by: Feng Kan 
Acked-by: Kumar Sankaran 
Signed-off-by: Catalin Marinas 
Cc: Mark Brown 
Signed-off-by: Greg Kroah-Hartman

arm64: virt: ensure visibility of __boot_cpu_mode

2014-01-09T20:24:26+00:00

commit 82b2f495fba338d1e3098dde1df54944a9c19751 upstream.

Secondary CPUs write to __boot_cpu_mode with caches disabled, and thus a
cached value of __boot_cpu_mode may be incoherent with that in memory.
This could lead to a failure to detect mismatched boot modes.

This patch adds flushing to ensure that writes by secondaries to
__boot_cpu_mode are made visible before we test against it.

Signed-off-by: Mark Rutland 
Cc: Marc Zyngier 
Cc: Christoffer Dall 
Signed-off-by: Catalin Marinas 
Cc: Mark Brown 
Signed-off-by: Greg Kroah-Hartman