linux-toradex.git/arch/arm64/include, branch v3.16.5

arm64: Add brackets around user_stack_pointer()

2014-10-05T20:41:03+00:00

commit 2520d039728b2a3c5ae7f79fe2a0e9d182855b12 upstream.

Commit 5f888a1d33 (ARM64: perf: support dwarf unwinding in compat mode)
changes user_stack_pointer() to return the compat SP for 32-bit tasks
but without brackets around the whole definition, with possible issues
on the call sites (noticed with a subsequent fix for KSTK_ESP).

Fixes: 5f888a1d33c4 (ARM64: perf: support dwarf unwinding in compat mode)
Reported-by: Sudeep Holla 
Signed-off-by: Catalin Marinas 
Signed-off-by: Will Deacon 
Signed-off-by: Greg Kroah-Hartman

arm64: ptrace: fix compat hardware watchpoint reporting

2014-10-05T20:40:53+00:00

commit 27d7ff273c2aad37b28f6ff0cab2cfa35b51e648 upstream.

I'm not sure what I was on when I wrote this, but when iterating over
the hardware watchpoint array (hbp_watch_array), our index is off by
ARM_MAX_BRP, so we walk off the end of our thread_struct...

... except, a dodgy condition in the loop means that it never executes
at all (bp cannot be NULL).

This patch fixes the code so that we remove the bp check and use the
correct index for accessing the watchpoint structures.

Signed-off-by: Will Deacon 
Signed-off-by: Greg Kroah-Hartman

arm64: Fix barriers used for page table modifications

2014-09-05T23:36:28+00:00

commit 7f0b1bf04511348995d6fce38c87c98a3b5cb781 upstream.

The architecture specification states that both DSB and ISB are required
between page table modifications and subsequent memory accesses using the
corresponding virtual address. When TLB invalidation takes place, the
tlb_flush_* functions already have the necessary barriers. However, there are
other functions like create_mapping() for which this is not the case.

The patch adds the DSB+ISB instructions in the set_pte() function for
valid kernel mappings. The invalid pte case is handled by tlb_flush_*
and the user mappings in general have a corresponding update_mmu_cache()
call containing a DSB. Even when update_mmu_cache() isn't called, the
kernel can still cope with an unlikely spurious page fault by
re-executing the instruction.

In addition, the set_pmd, set_pud() functions gain an ISB for
architecture compliance when block mappings are created.

Signed-off-by: Catalin Marinas 
Reported-by: Leif Lindholm 
Acked-by: Steve Capper 
Cc: Will Deacon 
Signed-off-by: Greg Kroah-Hartman

arm64: implement TASK_SIZE_OF

2014-07-08T16:30:59+00:00

include/linux/sched.h implements TASK_SIZE_OF as TASK_SIZE if it
is not set by the architecture headers.  TASK_SIZE uses the
current task to determine the size of the virtual address space.
On a 64-bit kernel this will cause reading /proc/pid/pagemap of a
64-bit process from a 32-bit process to return EOF when it reads
past 0xffffffff.

Implement TASK_SIZE_OF exactly the same as TASK_SIZE with
test_tsk_thread_flag instead of test_thread_flag.

Cc: stable@vger.kernel.org
Signed-off-by: Colin Cross 
Acked-by: Will Deacon 
Signed-off-by: Catalin Marinas

arm64: fix el2_setup check of CurrentEL

2014-07-04T15:16:52+00:00

The CurrentEL system register reports the Current Exception Level
of the CPU. It doesn't say anything about the stack handling, and
yet we compare it to PSR_MODE_EL2t and PSR_MODE_EL2h.

It works by chance because PSR_MODE_EL2t happens to match the right
bits, but that's otherwise a very bad idea. Just check for the EL
value instead.

Signed-off-by: Marc Zyngier 
[catalin.marinas@arm.com: fixed arch/arm64/kernel/efi-entry.S]
Signed-off-by: Catalin Marinas

arm64: mm: Fix horrendous config typo

2014-07-04T13:22:30+00:00

The define ARM64_64K_PAGES is tested for rather than
CONFIG_ARM64_64K_PAGES. Correct that typo here.

Signed-off-by: Steve Capper 
Signed-off-by: Catalin Marinas

arm64: mm: remove broken &= operator from pmd_mknotpresent

2014-06-18T15:34:30+00:00

This should be a plain old '&' and could easily lead to undefined
behaviour if the target of a pmd_mknotpresent invocation was the same
as the parameter.

Fixes: 9c7e535fcc17 (arm64: mm: Route pmd thp functions through pte equivalents)
Signed-off-by: Will Deacon 
Cc:  # v3.15
Signed-off-by: Catalin Marinas

arm64: fix build error in sigcontext.h

2014-06-18T11:41:56+00:00

I'm seeing this build failure for arm64:

    CC [M]  Documentation/filesystems/configfs/configfs_example_macros.o
  In file included from /usr/include/bits/sigcontext.h:27:0,
                   from /usr/include/signal.h:340,
                   from /usr/include/sys/wait.h:30,
                   from Documentation/accounting/getdelays.c:24:
  .../linux/usr/include/asm/sigcontext.h:61:2: error: unknown type name ‘u64’
    u64 esr;
    ^
  make[2]: *** [Documentation/accounting/getdelays] Error 1

This was introduced by commit 15af1942dd61ee23:

  arm64: Expose ESR_EL1 information to user when SIGSEGV/SIGBUS

Using __u64 instead of u64 fixes the problem.

Signed-off-by: Mark Salter 
Signed-off-by: Catalin Marinas

arm64/dma: Removing ARCH_HAS_DMA_GET_REQUIRED_MASK macro

2014-06-18T11:41:30+00:00

Arm64 does not define dma_get_required_mask() function.
Therefore, it should not define the ARCH_HAS_DMA_GET_REQUIRED_MASK.
This causes build errors in some device drivers (e.g. mpt2sas)

Signed-off-by: Suravee Suthikulpanit 
Signed-off-by: Catalin Marinas 
Cc:

arm64: uid16: fix __kernel_old_{gid,uid}_t definitions

2014-06-18T11:41:09+00:00

Whilst native arm64 applications don't have the 16-bit UID/GID syscalls
wired up, compat tasks can still access them. The 16-bit wrappers for
these syscalls use __kernel_old_uid_t and __kernel_old_gid_t, which must
be 16-bit data types to maintain compatibility with the 16-bit UIDs used
by compat applications.

This patch defines 16-bit __kernel_old_{gid,uid}_t types for arm64
instead of using the 32-bit types provided by asm-generic.

Signed-off-by: Will Deacon 
Acked-by: Arnd Bergmann 
Cc: 
Signed-off-by: Catalin Marinas