linux-toradex.git/arch/arm64/kvm/emulate-nested.c, branch v6.7

Merge tag 'kvmarm-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD

2023-10-31T20:37:07+00:00

KVM/arm64 updates for 6.7

 - Generalized infrastructure for 'writable' ID registers, effectively
   allowing userspace to opt-out of certain vCPU features for its guest

 - Optimization for vSGI injection, opportunistically compressing MPIDR
   to vCPU mapping into a table

 - Improvements to KVM's PMU emulation, allowing userspace to select
   the number of PMCs available to a VM

 - Guest support for memory operation instructions (FEAT_MOPS)

 - Cleanups to handling feature flags in KVM_ARM_VCPU_INIT, squashing
   bugs and getting rid of useless code

 - Changes to the way the SMCCC filter is constructed, avoiding wasted
   memory allocations when not in use

 - Load the stage-2 MMU context at vcpu_load() for VHE systems, reducing
   the overhead of errata mitigations

 - Miscellaneous kernel and selftest fixes

KVM: arm64: Refine _EL2 system register list that require trap reinjection

2023-10-25T00:24:53+00:00

Implement a fine grained approach in the _EL2 sysreg range instead of
the current wide cast trap. This ensures that we don't mistakenly
inject the wrong exception into the guest.

[maz: commit message massaging, dropped secure and AArch32 registers
      from the list]

Fixes: d0fc0a2519a6 ("KVM: arm64: nv: Add trap forwarding for HCR_EL2")
Reviewed-by: Eric Auger 
Signed-off-by: Miguel Luis 
Signed-off-by: Marc Zyngier 
Link: https://lore.kernel.org/r/20231023095444.1587322-4-maz@kernel.org
Signed-off-by: Oliver Upton

KVM: arm64: Add nPIR{E0}_EL1 to HFG traps

2023-10-12T15:38:50+00:00

nPIR_EL1 and nPIREO_EL1 are part of the 'reverse polarity' set of bits, set
them so that we disable the traps for a guest. Unfortunately, these bits
are not yet described in the ARM ARM, but only live in the XML description.

Also add them to the NV FGT forwarding infrastructure.

Signed-off-by: Joey Gouly 
Fixes: e930694e6145 ("KVM: arm64: Restructure FGT register switching")
Cc: Oliver Upton 
[maz: add entries to the NV FGT array, commit message update]
Signed-off-by: Marc Zyngier 
Link: https://lore.kernel.org/r/20231012123459.2820835-2-joey.gouly@arm.com

KVM: arm64: nv: Add trap description for SPSR_EL2 and ELR_EL2

2023-08-23T19:03:25+00:00

Having carved a hole for SP_EL1, we are now missing the entries
for SPSR_EL2 and ELR_EL2. Add them back.

Reported-by: Miguel Luis 
Signed-off-by: Marc Zyngier

KVM: arm64: nv: Add support for HCRX_EL2

2023-08-17T09:00:28+00:00

HCRX_EL2 has an interesting effect on HFGITR_EL2, as it conditions
the traps of TLBI*nXS.

Expand the FGT support to add a new Fine Grained Filter that will
get checked when the instruction gets trapped, allowing the shadow
register to override the trap as needed.

Reviewed-by: Eric Auger 
Signed-off-by: Marc Zyngier 
Reviewed-by: Jing Zhang 
Link: https://lore.kernel.org/r/20230815183903.2735724-29-maz@kernel.org

KVM: arm64: nv: Add trap forwarding for HDFGxTR_EL2

2023-08-17T09:00:27+00:00

... and finally, the Debug version of FGT, with its *enormous*
list of trapped registers.

Reviewed-by: Suzuki K Poulose 
Reviewed-by: Eric Auger 
Signed-off-by: Marc Zyngier 
Reviewed-by: Jing Zhang 
Link: https://lore.kernel.org/r/20230815183903.2735724-23-maz@kernel.org

KVM: arm64: nv: Add trap forwarding for HFGITR_EL2

2023-08-17T09:00:27+00:00

Similarly, implement the trap forwarding for instructions affected
by HFGITR_EL2.

Note that the TLBI*nXS instructions should be affected by HCRX_EL2,
which will be dealt with down the line. Also, ERET* and SVC traps
are handled separately.

Reviewed-by: Eric Auger 
Signed-off-by: Marc Zyngier 
Reviewed-by: Jing Zhang 
Link: https://lore.kernel.org/r/20230815183903.2735724-22-maz@kernel.org

KVM: arm64: nv: Add trap forwarding for HFGxTR_EL2

2023-08-17T09:00:27+00:00

Implement the trap forwarding for traps described by HFGxTR_EL2,
reusing the Fine Grained Traps infrastructure previously implemented.

Reviewed-by: Eric Auger 
Signed-off-by: Marc Zyngier 
Reviewed-by: Jing Zhang 
Link: https://lore.kernel.org/r/20230815183903.2735724-21-maz@kernel.org

KVM: arm64: nv: Add fine grained trap forwarding infrastructure

2023-08-17T09:00:27+00:00

Fine Grained Traps are fun. Not.

Implement the fine grained trap forwarding, reusing the Coarse Grained
Traps infrastructure previously implemented.

Each sysreg/instruction inserted in the xarray gets a FGT group
(vaguely equivalent to a register number), a bit number in that register,
and a polarity.

It is then pretty easy to check the FGT state at handling time, just
like we do for the coarse version (it is just faster).

Reviewed-by: Eric Auger 
Signed-off-by: Marc Zyngier 
Reviewed-by: Jing Zhang 
Link: https://lore.kernel.org/r/20230815183903.2735724-20-maz@kernel.org

KVM: arm64: nv: Add trap forwarding for CNTHCTL_EL2

2023-08-17T09:00:27+00:00

Describe the CNTHCTL_EL2 register, and associate it with all the sysregs
it allows to trap.

Reviewed-by: Eric Auger 
Signed-off-by: Marc Zyngier 
Reviewed-by: Jing Zhang 
Link: https://lore.kernel.org/r/20230815183903.2735724-19-maz@kernel.org