<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/arm, branch v3.19</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge tag 'sound-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound</title>
<updated>2015-02-06T20:50:37+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-02-06T20:50:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2af613d3739b04b16fbd3c2b824b9ebaace89328'/>
<id>2af613d3739b04b16fbd3c2b824b9ebaace89328</id>
<content type='text'>
Pull sound fixes from Takashi Iwai:
 "Hopefully the final pull request for 3.19: this ended up with a
  slightly higher volume than wished, but I put them all as they are
  either stable or 3.19 regression fixes.

  Most of commits are from ASoC, and have been stewed for a while in
  linux-next.  The only change in the common code is the regression
  fixes for ASoC AC97 stuff wrt device registrations.  The rest are
  device-specific, mostly small fixes in various ASoC drivers and ak411x
  on ice1724 boards"

* tag 'sound-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
  ASoC: Intel: fix sst firmware path for cht-bsw-rt5672
  ARM: dts: Fix I2S1, I2S2 compatible for exynos4 SoCs
  ASoC: sgtl5000: add delay before first I2C access
  MAINTAINERS: ASoC: add maintainer for Intel BDW/HSW ASoC driver
  ASoC: atmel_ssc_dai: fix the setting for DSP mode
  ASoC: sgtl5000: Use shift mask when setting codec mode
  ASoC: tlv320aic3x: Fix data delay configuration
  ALSA: ak411x: Fix stall in work callback
  ASoC: Intel: Used lock version to update shim registers
  ASoC: wm8731: init mutex in i2c init path
  ASoC: atmel_ssc_dai: fix start event for I2S mode
  ASoC: rt5640: Add RT5642 ACPI ID for Intel Baytrail
  ASoC: wm97xx: Reset AC'97 device before registering it
  ASoC: Add support for allocating AC'97 device before registering it
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull sound fixes from Takashi Iwai:
 "Hopefully the final pull request for 3.19: this ended up with a
  slightly higher volume than wished, but I put them all as they are
  either stable or 3.19 regression fixes.

  Most of commits are from ASoC, and have been stewed for a while in
  linux-next.  The only change in the common code is the regression
  fixes for ASoC AC97 stuff wrt device registrations.  The rest are
  device-specific, mostly small fixes in various ASoC drivers and ak411x
  on ice1724 boards"

* tag 'sound-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
  ASoC: Intel: fix sst firmware path for cht-bsw-rt5672
  ARM: dts: Fix I2S1, I2S2 compatible for exynos4 SoCs
  ASoC: sgtl5000: add delay before first I2C access
  MAINTAINERS: ASoC: add maintainer for Intel BDW/HSW ASoC driver
  ASoC: atmel_ssc_dai: fix the setting for DSP mode
  ASoC: sgtl5000: Use shift mask when setting codec mode
  ASoC: tlv320aic3x: Fix data delay configuration
  ALSA: ak411x: Fix stall in work callback
  ASoC: Intel: Used lock version to update shim registers
  ASoC: wm8731: init mutex in i2c init path
  ASoC: atmel_ssc_dai: fix start event for I2S mode
  ASoC: rt5640: Add RT5642 ACPI ID for Intel Baytrail
  ASoC: wm97xx: Reset AC'97 device before registering it
  ASoC: Add support for allocating AC'97 device before registering it
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge remote-tracking branch 'asoc/fix/samsung' into asoc-linus</title>
<updated>2015-02-05T19:36:29+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2015-02-05T19:36:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c503ca52a57cfe24f8937ca145a96ba94f6bb112'/>
<id>c503ca52a57cfe24f8937ca145a96ba94f6bb112</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: Fix I2S1, I2S2 compatible for exynos4 SoCs</title>
<updated>2015-02-05T19:36:00+00:00</updated>
<author>
<name>Sylwester Nawrocki</name>
<email>s.nawrocki@samsung.com</email>
</author>
<published>2015-02-03T14:06:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fddcd300732dad5b822d27de7aa78998dca43162'/>
<id>fddcd300732dad5b822d27de7aa78998dca43162</id>
<content type='text'>
I2S1, I2S2 on Exynos4 SoC series have limited functionality compared
to I2S0, "samsung,s3c6410-i2s" compatible should be used for them.

Signed-off-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Cc: stable@vger.kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
I2S1, I2S2 on Exynos4 SoC series have limited functionality compared
to I2S0, "samsung,s3c6410-i2s" compatible should be used for them.

Signed-off-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Cc: stable@vger.kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm</title>
<updated>2015-02-04T17:42:55+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-02-04T17:42:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5659c0e4708d2893606df3335cb453f17220bd60'/>
<id>5659c0e4708d2893606df3335cb453f17220bd60</id>
<content type='text'>
Pull ARM fixes from Russell King:
 "A number of ARM fixes, the biggest is fixing a regression caused by
  appended DT blobs exceeding 64K, causing the decompressor fixup code
  to fail to patch the DT blob.  Another important fix is for the ASID
  allocator from Will Deacon which prevents some rare crashes seen on
  some systems.  Lastly, there's a build fix for v7M systems when printk
  support is disabled.

  The last two remaining fixes are more cosmetic - the IOMMU one
  prevents an annoying harmless warning message, and we disable the
  kernel strict memory permissions on non-MMU which can't support it
  anyway"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8299/1: mm: ensure local active ASID is marked as allocated on rollover
  ARM: 8298/1: ARM_KERNMEM_PERMS only works with MMU enabled
  ARM: 8295/1: fix v7M build for !CONFIG_PRINTK
  ARM: 8294/1: ATAG_DTB_COMPAT: remove the DT workspace's hardcoded 64KB size
  ARM: 8288/1: dma-mapping: don't detach devices without an IOMMU during teardown
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM fixes from Russell King:
 "A number of ARM fixes, the biggest is fixing a regression caused by
  appended DT blobs exceeding 64K, causing the decompressor fixup code
  to fail to patch the DT blob.  Another important fix is for the ASID
  allocator from Will Deacon which prevents some rare crashes seen on
  some systems.  Lastly, there's a build fix for v7M systems when printk
  support is disabled.

  The last two remaining fixes are more cosmetic - the IOMMU one
  prevents an annoying harmless warning message, and we disable the
  kernel strict memory permissions on non-MMU which can't support it
  anyway"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8299/1: mm: ensure local active ASID is marked as allocated on rollover
  ARM: 8298/1: ARM_KERNMEM_PERMS only works with MMU enabled
  ARM: 8295/1: fix v7M build for !CONFIG_PRINTK
  ARM: 8294/1: ATAG_DTB_COMPAT: remove the DT workspace's hardcoded 64KB size
  ARM: 8288/1: dma-mapping: don't detach devices without an IOMMU during teardown
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8299/1: mm: ensure local active ASID is marked as allocated on rollover</title>
<updated>2015-02-03T12:57:33+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2015-01-29T15:41:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8e64806672466392acf19e14427d1c29df3e58b9'/>
<id>8e64806672466392acf19e14427d1c29df3e58b9</id>
<content type='text'>
Commit e1a5848e3398 ("ARM: 7924/1: mm: don't bother with reserved ttbr0
when running with LPAE") removed the use of the reserved TTBR0 value
for LPAE systems, since the ASID is held in the TTBR and can be updated
atomicly with the pgd of the next mm.

Unfortunately, this patch forgot to update flush_context, which
deliberately avoids marking the local active ASID as allocated, since we
used to switch via ASID zero and didn't need to allocate the ASID of
the previous mm. The side-effect of this is that we can allocate the
same ASID to the next mm and, between flushing the local TLB and updating
TTBR0, we can perform speculative TLB fills for userspace nG mappings
using the page table of the previous mm.

The consequence of this is that the next mm can erroneously hit some
mappings of the previous mm. Note that this was made significantly
harder to hit by a391263cd84e ("ARM: 8203/1: mm: try to re-use old ASID
assignments following a rollover") but is still theoretically possible.

This patch fixes the problem by removing the code from flush_context
that forces the allocated ASID to zero for the local CPU. Many thanks
to the Broadcom guys for tracking this one down.

Fixes: e1a5848e3398 ("ARM: 7924/1: mm: don't bother with reserved ttbr0 when running with LPAE")

Cc: &lt;stable@vger.kernel.org&gt; # v3.14+
Reported-by: Raymond Ngun &lt;rngun@broadcom.com&gt;
Tested-by: Raymond Ngun &lt;rngun@broadcom.com&gt;
Reviewed-by: Gregory Fong &lt;gregory.0xf0@gmail.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Commit e1a5848e3398 ("ARM: 7924/1: mm: don't bother with reserved ttbr0
when running with LPAE") removed the use of the reserved TTBR0 value
for LPAE systems, since the ASID is held in the TTBR and can be updated
atomicly with the pgd of the next mm.

Unfortunately, this patch forgot to update flush_context, which
deliberately avoids marking the local active ASID as allocated, since we
used to switch via ASID zero and didn't need to allocate the ASID of
the previous mm. The side-effect of this is that we can allocate the
same ASID to the next mm and, between flushing the local TLB and updating
TTBR0, we can perform speculative TLB fills for userspace nG mappings
using the page table of the previous mm.

The consequence of this is that the next mm can erroneously hit some
mappings of the previous mm. Note that this was made significantly
harder to hit by a391263cd84e ("ARM: 8203/1: mm: try to re-use old ASID
assignments following a rollover") but is still theoretically possible.

This patch fixes the problem by removing the code from flush_context
that forces the allocated ASID to zero for the local CPU. Many thanks
to the Broadcom guys for tracking this one down.

Fixes: e1a5848e3398 ("ARM: 7924/1: mm: don't bother with reserved ttbr0 when running with LPAE")

Cc: &lt;stable@vger.kernel.org&gt; # v3.14+
Reported-by: Raymond Ngun &lt;rngun@broadcom.com&gt;
Tested-by: Raymond Ngun &lt;rngun@broadcom.com&gt;
Reviewed-by: Gregory Fong &lt;gregory.0xf0@gmail.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-02-01T21:20:47+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-02-01T21:20:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fba7e99458b606dc9a84332d38cd40e9d367633f'/>
<id>fba7e99458b606dc9a84332d38cd40e9d367633f</id>
<content type='text'>
Pull ARM SoC fixes from Olof Johansson:
 "One more week's worth of fixes.  Worth pointing out here are:

   - A patch fixing detaching of iommu registrations when a device is
     removed -- earlier the ops pointer wasn't managed properly
   - Another set of Renesas boards get the same GIC setup fixup as
     others have in previous -rcs
   - Serial port aliases fixups for sunxi.  We did the same to tegra but
     we caught that in time before the merge window due to more machines
     being affected.  Here it took longer for anyone to notice.
   - A couple more DT tweaks on sunxi
   - A follow-up patch for the mvebu coherency disabling in last -rc
     batch"

* tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  arm: dma-mapping: Set DMA IOMMU ops in arm_iommu_attach_device()
  ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
  ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds
  ARM: mvebu: don't set the PL310 in I/O coherency mode when I/O coherency is disabled
  ARM: sunxi: dt: Fix aliases
  ARM: dts: sun4i: Add simplefb node with de_fe0-de_be0-lcd0-hdmi pipeline
  ARM: dts: sun6i: ippo-q8h-v5: Fix serial0 alias
  ARM: dts: sunxi: Fix usb-phy support for sun4i/sun5i
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC fixes from Olof Johansson:
 "One more week's worth of fixes.  Worth pointing out here are:

   - A patch fixing detaching of iommu registrations when a device is
     removed -- earlier the ops pointer wasn't managed properly
   - Another set of Renesas boards get the same GIC setup fixup as
     others have in previous -rcs
   - Serial port aliases fixups for sunxi.  We did the same to tegra but
     we caught that in time before the merge window due to more machines
     being affected.  Here it took longer for anyone to notice.
   - A couple more DT tweaks on sunxi
   - A follow-up patch for the mvebu coherency disabling in last -rc
     batch"

* tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  arm: dma-mapping: Set DMA IOMMU ops in arm_iommu_attach_device()
  ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
  ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds
  ARM: mvebu: don't set the PL310 in I/O coherency mode when I/O coherency is disabled
  ARM: sunxi: dt: Fix aliases
  ARM: dts: sun4i: Add simplefb node with de_fe0-de_be0-lcd0-hdmi pipeline
  ARM: dts: sun6i: ippo-q8h-v5: Fix serial0 alias
  ARM: dts: sunxi: Fix usb-phy support for sun4i/sun5i
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes</title>
<updated>2015-02-01T16:51:12+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2015-02-01T16:51:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=28111dda37e653781efc73c06229f006739b3982'/>
<id>28111dda37e653781efc73c06229f006739b3982</id>
<content type='text'>
Merge "Third Round of Renesas ARM Based SoC Fixes for v3.19" from Simon Horman:

* Instantiate GIC from C board code in legacy builds on r8a7790 and r8a73a4

* tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
  ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Merge "Third Round of Renesas ARM Based SoC Fixes for v3.19" from Simon Horman:

* Instantiate GIC from C board code in legacy builds on r8a7790 and r8a73a4

* tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
  ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm</title>
<updated>2015-01-30T18:45:24+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-01-30T18:45:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1f59fe76678b49fc406c6d7b63dec4abe60a0547'/>
<id>1f59fe76678b49fc406c6d7b63dec4abe60a0547</id>
<content type='text'>
Pull KVM fixes from Paolo Bonzini:
 "The ARM changes are largish, but not too scary.  And a simple fix for
  x86 (bug introduced in 3.19)"

(Paolo sayus these are the "Final" fixes. We'll see).

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: x86: check LAPIC presence when building apic_map
  arm/arm64: KVM: Use kernel mapping to perform invalidation on page fault
  arm/arm64: KVM: Invalidate data cache on unmap
  arm/arm64: KVM: Use set/way op trapping to track the state of the caches
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull KVM fixes from Paolo Bonzini:
 "The ARM changes are largish, but not too scary.  And a simple fix for
  x86 (bug introduced in 3.19)"

(Paolo sayus these are the "Final" fixes. We'll see).

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: x86: check LAPIC presence when building apic_map
  arm/arm64: KVM: Use kernel mapping to perform invalidation on page fault
  arm/arm64: KVM: Invalidate data cache on unmap
  arm/arm64: KVM: Use set/way op trapping to track the state of the caches
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'kvm-arm-fixes-3.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master</title>
<updated>2015-01-30T08:41:38+00:00</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2015-01-30T08:41:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=02512b2bd63385d1f34f6956860dedbfc9ac20d7'/>
<id>02512b2bd63385d1f34f6956860dedbfc9ac20d7</id>
<content type='text'>
Second round of fixes for KVM/ARM for 3.19.

Fixes memory corruption issues on APM platforms and swapping issues on
DMA-coherent systems.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Second round of fixes for KVM/ARM for 3.19.

Fixes memory corruption issues on APM platforms and swapping issues on
DMA-coherent systems.
</pre>
</div>
</content>
</entry>
<entry>
<title>arm/arm64: KVM: Use kernel mapping to perform invalidation on page fault</title>
<updated>2015-01-29T22:24:57+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2015-01-05T21:13:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0d3e4d4fade6b04e933b11e69e80044f35e9cd60'/>
<id>0d3e4d4fade6b04e933b11e69e80044f35e9cd60</id>
<content type='text'>
When handling a fault in stage-2, we need to resync I$ and D$, just
to be sure we don't leave any old cache line behind.

That's very good, except that we do so using the *user* address.
Under heavy load (swapping like crazy), we may end up in a situation
where the page gets mapped in stage-2 while being unmapped from
userspace by another CPU.

At that point, the DC/IC instructions can generate a fault, which
we handle with kvm-&gt;mmu_lock held. The box quickly deadlocks, user
is unhappy.

Instead, perform this invalidation through the kernel mapping,
which is guaranteed to be present. The box is much happier, and so
am I.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When handling a fault in stage-2, we need to resync I$ and D$, just
to be sure we don't leave any old cache line behind.

That's very good, except that we do so using the *user* address.
Under heavy load (swapping like crazy), we may end up in a situation
where the page gets mapped in stage-2 while being unmapped from
userspace by another CPU.

At that point, the DC/IC instructions can generate a fault, which
we handle with kvm-&gt;mmu_lock held. The box quickly deadlocks, user
is unhappy.

Instead, perform this invalidation through the kernel mapping,
which is guaranteed to be present. The box is much happier, and so
am I.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
