linux-toradex.git/arch/blackfin/kernel/asm-offsets.c, branch v3.0.100

Blackfin: mass clean up of copyright/licensing info

2009-10-07T08:36:26+00:00

Bill Gatliff & David Brownell pointed out we were missing some
copyrights, and licensing terms in some of the files in
./arch/blackfin, so this fixes things, and cleans them up.

It also removes:
 - verbose GPL text(refer to the top level ./COPYING file)
 - file names (you are looking at the file)
 - bug url (it's in the ./MAINTAINERS file)
 - "or later" on GPL-2, when we did not have that right

It also allows some Blackfin-specific assembly files to be under a BSD
like license (for people to use them outside of Linux).

Signed-off-by: Robin Getz 
Signed-off-by: Mike Frysinger

Blackfin: improve double fault debug handling

2009-09-17T01:31:57+00:00

Since the hardware only provides reporting for the last exception handled,
and the values are valid only when executing the exception handler, we
need to save the context for reporting at a later point.  While we do this
for one exception, it doesn't work properly when handling a second one as
the original exception is clobbered by the double fault.  So when double
fault debugging is enabled, create a dedicated shadow of these values and
save/restore out of there.  Now the crash report properly displays the
first exception as well as the second one.

Signed-off-by: Graf Yang 
Signed-off-by: Mike Frysinger

Blackfin: make EVT3->EVT5 lowering more robust wrt IPEND[4]

2009-09-17T01:28:28+00:00

We handle many exceptions at EVT5 (hardware error level) so that we can
catch exceptions in our exception handling code.  Today - if the global
interrupt enable bit (IPEND[4]) is set (interrupts disabled) our trap
handling code goes into a infinite loop, since we need interrupts to be
on to defer things to EVT5.

Normal kernel code should not trigger this for any reason as IPEND[4] gets
cleared early (when doing an interrupt context save) and the kernel stack
there should be sane (or something much worse is happening in the system).
But there have been a few times where this has happened, so this change
makes sure we dump a proper crash message even when things have gone south.

Signed-off-by: Robin Getz 
Signed-off-by: Mike Frysinger

Blackfin arch: SMP supporting patchset: Blackfin kernel and memory management code

2008-11-18T09:48:22+00:00

Blackfin dual core BF561 processor can support SMP like features.
https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like

In this patch, we provide SMP extend to Blackfin kernel and memory management code

Singed-off-by: Graf Yang 
Signed-off-by: Mike Frysinger 
Signed-off-by: Bryan Wu

Blackfin arch: ptrace - make sure PT_ORIG_R0 and PT_ORIG_P0 offsets are declared

2008-10-09T07:22:56+00:00

Signed-off-by: Mike Frysinger 
Signed-off-by: Bryan Wu

[Blackfin] arch: Delete unused (copied from m68k) entries in asm-offsets.c.

2008-05-07T03:41:26+00:00

Fix some really ancient code that was correct only for the m68k port.
Delete unused (i.e. copied from m68k) entries in asm-offsets.c.

Signed-off-by: Bernd Schmidt 
Signed-off-by: Bryan Wu

blackfin: use kbuild.h instead of defining macros in asm-macros.c

2008-04-29T15:06:29+00:00

Signed-off-by: Christoph Lameter 
Cc: Bryan Wu 
Cc: Mike Frysinger 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

Blackfin arch: cleanup warnings from checkpatch -- no functional changes

2007-07-12T14:58:21+00:00

Signed-off-by: Mike Frysinger 
Signed-off-by: Bryan Wu

wrap access to thread_info

2007-05-09T19:30:56+00:00

Recently a few direct accesses to the thread_info in the task structure snuck
back, so this wraps them with the appropriate wrapper.

Signed-off-by: Roman Zippel 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

blackfin architecture

2007-05-07T19:12:58+00:00

This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix!  Tinyboards.

The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc.  (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000.  Since then ADI has put this core into its Blackfin
processor family of devices.  The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set.  It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.

The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf

The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc

This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/

We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel

[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu 
Signed-off-by: Mariusz Kozlowski 
Signed-off-by: Aubrey Li 
Signed-off-by: Jie Zhang 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds