linux-toradex.git/arch/blackfin/kernel/cacheinit.c, branch v2.6.23.2 Linux kernel for Apalis and Colibri modules Blackfin arch: Start untangling the CPLB handling code. 2007-07-12T08:25:29+00:00 Bernd Schmidt bernd.schmidt@analog.com 2007-07-12T08:25:29+00:00 29440a2b4cd37e32dfe0fa60ef1665775b24dab1 - Move cache initialization to C from assembly. - Move anomaly workaround for writing [ID]MEM_CONTROL to assembly, so that we don't have to mess around with .align directives in C source. - Fix a bug where bfin_write_DMEM_CONTROL would write to IMEM_CONTROL - Break out CPLB related code from kernel/setup.c into their own file. - Don't define variables in header files, only declare them. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> 
 - Move cache initialization to C from assembly.
 - Move anomaly workaround for writing [ID]MEM_CONTROL to assembly, so
   that we don't have to mess around with .align directives in C source.
 - Fix a bug where bfin_write_DMEM_CONTROL would write to IMEM_CONTROL
 - Break out CPLB related code from kernel/setup.c into their own file.
 - Don't define variables in header files, only declare them.

Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>