linux-toradex.git/arch/blackfin/kernel, branch v3.1.2

atomic: use

2011-07-26T23:49:47+00:00

This allows us to move duplicated code in 
(atomic_inc_not_zero() for now) to 

Signed-off-by: Arun Sharma 
Reviewed-by: Eric Dumazet 
Cc: Ingo Molnar 
Cc: David Miller 
Cc: Eric Dumazet 
Acked-by: Mike Frysinger 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

modules: make arch's use default loader hooks

2011-07-24T12:36:04+00:00

This patch removes all the module loader hook implementations in the
architecture specific code where the functionality is the same as that
now provided by the recently added default hooks.

Signed-off-by: Jonas Bonn 
Acked-by: Mike Frysinger 
Acked-by: Geert Uytterhoeven 
Tested-by: Michal Simek 
Signed-off-by: Rusty Russell

Blackfin: bf526: restrict reboot workaround to 0.0 silicon

2011-07-23T05:18:33+00:00

The bug in the BF526 rom when doing a software reset exists only in older
silicon versions, so don't clear SWRST on newer parts.

Signed-off-by: Mike Frysinger

Blackfin: bf54x: fix GPIO resume code

2011-07-23T05:18:32+00:00

Back in commit c03c2a87347b849ec927d, we fixed logic in the non-bf54x
GPIO resume code to set the data levels properly before the direction
to avoid spurious line glitches.  But we missed the bf54x code paths.
So add the same fix there.

Signed-off-by: Mike Frysinger

Blackfin: bf538: pull gpio/port logic out of core hibernate paths

2011-07-23T05:18:30+00:00

Re-architect how we save/restore the gpio/port logic that only pertains
to bf538/bf539 parts by pulling it out of the core code paths and pushing
it out to bf538-specific locations.

Signed-off-by: Mike Frysinger

Blackfin: debug-mmrs: generalize pint logic

2011-07-23T05:18:26+00:00

Don't bind the code to specific CPU defines.

Signed-off-by: Mike Frysinger

Blackfin: bf54x: tweak MMR pint names

2011-07-23T05:18:25+00:00

The hardware block uses the name "request" rather than "irq", so update
the struct accordingly.

Signed-off-by: Mike Frysinger

Blackfin: pwm: implement linux/pwm.h API

2011-07-23T05:18:23+00:00

For now, this only supports gptimers.  Support for dedicated PWM devices
as found on newer parts to come.

Signed-off-by: Michael Hennerich 
Signed-off-by: Mike Frysinger

Blackfin: make sure percpu section is aligned in XIP builds

2011-07-23T05:18:22+00:00

The alignment is normally handled by PERCPU(), but we need to do it
ourselves in the XIP build due to the custom layout.

Signed-off-by: Steven Miao 
Signed-off-by: Mike Frysinger

Blackfin: gptimers: use bfin read/write helpers

2011-07-23T05:18:21+00:00

Use proper helper macros for reading/writing the MMRs rather than
volatile markings on the struct.

Signed-off-by: Mike Frysinger