<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/ia64/kernel, branch v2.6.12-rc4</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge with master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6.git</title>
<updated>2005-05-05T12:59:37+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>dwmw2@shinybook.infradead.org</email>
</author>
<published>2005-05-05T12:59:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bfd4bda097f8758d28e632ff2035e25577f6b060'/>
<id>bfd4bda097f8758d28e632ff2035e25577f6b060</id>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>[IA64] Fix two warnings introduced by perfmon patches.</title>
<updated>2005-05-03T23:21:45+00:00</updated>
<author>
<name>Tony Luck</name>
<email>tony.luck@intel.com</email>
</author>
<published>2005-05-03T23:21:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a71f62edc935fbdc346c5b16bea19f1480d29635'/>
<id>a71f62edc935fbdc346c5b16bea19f1480d29635</id>
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Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
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<pre>
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>[IA64] another perfmon fix (take2)</title>
<updated>2005-05-03T22:47:58+00:00</updated>
<author>
<name>stephane eranian</name>
<email>eranian@hpl.hp.com</email>
</author>
<published>2005-04-18T18:42:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a5a70b75d93b26e14c0c5e759099d602a480b9e2'/>
<id>a5a70b75d93b26e14c0c5e759099d602a480b9e2</id>
<content type='text'>
- pfm_context_load(): change return value from EINVAL to EBUSY
  when context is already loaded.

- pfm_check_task_state(): pass test if context state is MASKED.
  It is safe to give access on PFM_CTX_MASKED because the PMU
  state (PMD) is stable and saved in software state.
  This helps multiplexing programs such as the example given
  in libpfm-3.1.

Signed-off-by: stephane eranian &lt;eranian@hpl.hp.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
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<pre>
- pfm_context_load(): change return value from EINVAL to EBUSY
  when context is already loaded.

- pfm_check_task_state(): pass test if context state is MASKED.
  It is safe to give access on PFM_CTX_MASKED because the PMU
  state (PMD) is stable and saved in software state.
  This helps multiplexing programs such as the example given
  in libpfm-3.1.

Signed-off-by: stephane eranian &lt;eranian@hpl.hp.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[IA64] perfmon &amp; PAL_HALT again</title>
<updated>2005-05-03T22:44:48+00:00</updated>
<author>
<name>Stephane Eranian</name>
<email>eranian@hpl.hp.com</email>
</author>
<published>2005-04-11T20:45:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8df5a500a3e97f7811cdce0f553ca1917ccd4220'/>
<id>8df5a500a3e97f7811cdce0f553ca1917ccd4220</id>
<content type='text'>
The pmu_active test is based on the values of PSR.up. THIS IS THE PROBLEM as
it does not take into account the lazy restore logic which is as follow (simplified):

context switch out:
	save PMDs
	clear psr.up
	release ownership

context switch in:
	if (ctx-&gt;last_cpu == smp_processor_id() &amp;&amp; ctx-&gt;cpu_activation == cpu_activation) {
		set psr.up
		return
	}
	restore PMD
	restore PMC
	ctx-&gt;last_cpu   = smp_processor_id();
	ctx-&gt;activation = ++cpu_activation;
	set psr.up

The key here is that on context switch out, we clear psr.up and on context switch in
we check if nobody else used the PMU on that processor since last time we came. In
that case, we assume the PMD/PMC are ours and we simply reactivate.

The Caliper problem is that between the moment we context switch out and the moment we
come back, nobody effectively used the PMU BUT the processor went idle. Normally this
would have no incidence but PAL_HALT does alter the PMU registers.  In default_idle(),
the test on psr.up is not strong enough to cover this case and we go into PAL which
trashed the PMU resgisters. When we come back we falsely assume that this is our state
yet it is corrupted. Very nasty indeed.

To avoid the problem it is necessary to forbid going to PAL_HALT as soon as perfmon
installs some valid state in the PMU registers. This happens with an application
attaches a context to a thread or CPU. It is not enough to check the psr/dcr bits.
Hence I propose the attached patch. It adds a callback in process.c to modify the
condition to enter PAL on idle. Basically, now it is conditional to pal_halt=1 AND
perfmon saying it is okay.

Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
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<pre>
The pmu_active test is based on the values of PSR.up. THIS IS THE PROBLEM as
it does not take into account the lazy restore logic which is as follow (simplified):

context switch out:
	save PMDs
	clear psr.up
	release ownership

context switch in:
	if (ctx-&gt;last_cpu == smp_processor_id() &amp;&amp; ctx-&gt;cpu_activation == cpu_activation) {
		set psr.up
		return
	}
	restore PMD
	restore PMC
	ctx-&gt;last_cpu   = smp_processor_id();
	ctx-&gt;activation = ++cpu_activation;
	set psr.up

The key here is that on context switch out, we clear psr.up and on context switch in
we check if nobody else used the PMU on that processor since last time we came. In
that case, we assume the PMD/PMC are ours and we simply reactivate.

The Caliper problem is that between the moment we context switch out and the moment we
come back, nobody effectively used the PMU BUT the processor went idle. Normally this
would have no incidence but PAL_HALT does alter the PMU registers.  In default_idle(),
the test on psr.up is not strong enough to cover this case and we go into PAL which
trashed the PMU resgisters. When we come back we falsely assume that this is our state
yet it is corrupted. Very nasty indeed.

To avoid the problem it is necessary to forbid going to PAL_HALT as soon as perfmon
installs some valid state in the PMU registers. This happens with an application
attaches a context to a thread or CPU. It is not enough to check the psr/dcr bits.
Hence I propose the attached patch. It adds a callback in process.c to modify the
condition to enter PAL on idle. Basically, now it is conditional to pal_halt=1 AND
perfmon saying it is okay.

Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[IA64] MCA recovery improvements</title>
<updated>2005-05-03T20:47:42+00:00</updated>
<author>
<name>Russ Anderson</name>
<email>rja@sgi.com</email>
</author>
<published>2005-04-06T07:07:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b1b901c2029aa0fd8aa4ac5f04f31648ae2358b4'/>
<id>b1b901c2029aa0fd8aa4ac5f04f31648ae2358b4</id>
<content type='text'>
Jack Steiner uncovered some opportunities for improvement in
the MCA recovery code.

  1) Set bsp to save registers on the kernel stack.
  2) Disable interrupts while in the MCA recovery code.
  3) Change the way the user process is killed, to avoid 
     a panic in schedule.

Testing shows that these changes make the recovery code much 
more reliable with the 2.6.12 kernel.

Signed-off-by: Russ Anderson &lt;rja@sgi.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
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<pre>
Jack Steiner uncovered some opportunities for improvement in
the MCA recovery code.

  1) Set bsp to save registers on the kernel stack.
  2) Disable interrupts while in the MCA recovery code.
  3) Change the way the user process is killed, to avoid 
     a panic in schedule.

Testing shows that these changes make the recovery code much 
more reliable with the 2.6.12 kernel.

Signed-off-by: Russ Anderson &lt;rja@sgi.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[IA64] fix ia64 syscall auditing</title>
<updated>2005-05-03T20:45:39+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>dwmw2@infradead.org</email>
</author>
<published>2005-04-06T00:47:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=446b8831f5acf2076fa58a66286789eb84f3df2c'/>
<id>446b8831f5acf2076fa58a66286789eb84f3df2c</id>
<content type='text'>
Attached is a patch against David's audit.17 kernel that adds checks
for the TIF_SYSCALL_AUDIT thread flag to the ia64 system call and
signal handling code paths.  The patch enables auditing of system
calls set up via fsys_bubble_down, as well as ensuring that
audit_syscall_exit() is called on return from sigreturn.

Neglecting to check for TIF_SYSCALL_AUDIT at these points results in
incorrect information in audit_context, causing frequent system panics
when system call auditing is enabled on an ia64 system.

I have tested this patch and have seen no problems with it.

[Original patch from Amy Griffis ported to current kernel by David Woodhouse]

From: Amy Griffis &lt;amy.griffis@hp.com&gt;
From: David Woodhouse &lt;dwmw2@infradead.org&gt;
Signed-off-by: Chris Wright &lt;chrisw@osdl.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
<content type='xhtml'>
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<pre>
Attached is a patch against David's audit.17 kernel that adds checks
for the TIF_SYSCALL_AUDIT thread flag to the ia64 system call and
signal handling code paths.  The patch enables auditing of system
calls set up via fsys_bubble_down, as well as ensuring that
audit_syscall_exit() is called on return from sigreturn.

Neglecting to check for TIF_SYSCALL_AUDIT at these points results in
incorrect information in audit_context, causing frequent system panics
when system call auditing is enabled on an ia64 system.

I have tested this patch and have seen no problems with it.

[Original patch from Amy Griffis ported to current kernel by David Woodhouse]

From: Amy Griffis &lt;amy.griffis@hp.com&gt;
From: David Woodhouse &lt;dwmw2@infradead.org&gt;
Signed-off-by: Chris Wright &lt;chrisw@osdl.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[IA64] reduce cacheline bouncing in cpu_idle_wait</title>
<updated>2005-05-03T20:40:18+00:00</updated>
<author>
<name>Zwane Mwaikambo</name>
<email>zwane@arm.linux.org.uk</email>
</author>
<published>2005-03-31T04:40:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7d5f9c0f10255000ca007fb03773c6b825c2b9ce'/>
<id>7d5f9c0f10255000ca007fb03773c6b825c2b9ce</id>
<content type='text'>
Andi noted that during normal runtime cpu_idle_map is bounced around a lot,
and occassionally at a higher frequency than the timer interrupt wakeup
which we normally exit pm_idle from.  So switch to a percpu variable.

I didn't move things to the slow path because it would involve adding
scheduler code to wakeup the idle thread on the cpus we're waiting for.

Signed-off-by: Zwane Mwaikambo &lt;zwane@arm.linux.org.uk&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
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<pre>
Andi noted that during normal runtime cpu_idle_map is bounced around a lot,
and occassionally at a higher frequency than the timer interrupt wakeup
which we normally exit pm_idle from.  So switch to a percpu variable.

I didn't move things to the slow path because it would involve adding
scheduler code to wakeup the idle thread on the cpus we're waiting for.

Signed-off-by: Zwane Mwaikambo &lt;zwane@arm.linux.org.uk&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[IA64] use common pxm function</title>
<updated>2005-05-03T20:33:18+00:00</updated>
<author>
<name>Alex Williamson</name>
<email>alex.williamson@hp.com</email>
</author>
<published>2005-03-25T05:58:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bb0fc085457cf6a865b8232b0cefab3a7819df44'/>
<id>bb0fc085457cf6a865b8232b0cefab3a7819df44</id>
<content type='text'>
This patch simplifies a couple places where we search for _PXM
values in ACPI namespace.  Thanks,

Signed-off-by: Alex Williamson &lt;alex.williamson@hp.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
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<pre>
This patch simplifies a couple places where we search for _PXM
values in ACPI namespace.  Thanks,

Signed-off-by: Alex Williamson &lt;alex.williamson@hp.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[IA64] fix typos caught by new assembler</title>
<updated>2005-05-03T17:56:42+00:00</updated>
<author>
<name>David Mosberger-Tang</name>
<email>davidm@hpl.hp.com</email>
</author>
<published>2005-03-25T07:16:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9df6f705c0934a49d0f0a3468a5b5044c8aec4f1'/>
<id>9df6f705c0934a49d0f0a3468a5b5044c8aec4f1</id>
<content type='text'>
Patch below fixes 3 trivial typos which are caught by the new
assembler (v2.169.90).  Please apply.

[Note: fix to memcpy that was also part of this patch was separately
 applied from patches by H.J. and Andreas ... so the delta here only
 has the other two fixes. -Tony]

Signed-off-by: David Mosberger-Tang &lt;davidm@hpl.hp.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
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<pre>
Patch below fixes 3 trivial typos which are caught by the new
assembler (v2.169.90).  Please apply.

[Note: fix to memcpy that was also part of this patch was separately
 applied from patches by H.J. and Andreas ... so the delta here only
 has the other two fixes. -Tony]

Signed-off-by: David Mosberger-Tang &lt;davidm@hpl.hp.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge with master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6.git</title>
<updated>2005-05-03T07:14:09+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>dwmw2@shinybook.infradead.org</email>
</author>
<published>2005-05-03T07:14:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=27b030d58c8e72fc7a95187a791bd9406e350f02'/>
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<pre>
</pre>
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