<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/m68k/mm, branch v3.4.85</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Disintegrate asm/system.h for M68K</title>
<updated>2012-03-28T17:30:02+00:00</updated>
<author>
<name>David Howells</name>
<email>dhowells@redhat.com</email>
</author>
<published>2012-03-28T17:30:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=803f69144f0d48863c68f9d111b56849c7cef5bb'/>
<id>803f69144f0d48863c68f9d111b56849c7cef5bb</id>
<content type='text'>
Disintegrate asm/system.h for M68K.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
Acked-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
cc: linux-m68k@lists.linux-m68k.org
</content>
<content type='xhtml'>
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<pre>
Disintegrate asm/system.h for M68K.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
Acked-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
cc: linux-m68k@lists.linux-m68k.org
</pre>
</div>
</content>
</entry>
<entry>
<title>m68k: Do not set global share for non-kernel shared pages</title>
<updated>2012-02-07T01:25:57+00:00</updated>
<author>
<name>Alexander Stein</name>
<email>alexander.stein@systec-electronic.com</email>
</author>
<published>2012-01-23T14:45:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3372f5a7d005dd42e754490fed6a0171c4a018c6'/>
<id>3372f5a7d005dd42e754490fed6a0171c4a018c6</id>
<content type='text'>
If the SG bit is set in MMUTR the page is accessible for all
userspace processes (ignoring the ASID). So a process might randomly
access a page from a different process which had a shared page
(from shared memory) in its context.

Signed-off-by: Alexander Stein &lt;alexander.stein@systec-electronic.com&gt;
Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
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<pre>
If the SG bit is set in MMUTR the page is accessible for all
userspace processes (ignoring the ASID). So a process might randomly
access a page from a different process which had a shared page
(from shared memory) in its context.

Signed-off-by: Alexander Stein &lt;alexander.stein@systec-electronic.com&gt;
Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k</title>
<updated>2012-01-26T20:43:57+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-01-26T20:43:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0dbfe8ddaaab9fe5bc8672c064d3ede6cd66201a'/>
<id>0dbfe8ddaaab9fe5bc8672c064d3ede6cd66201a</id>
<content type='text'>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
  m68k: Fix assembler constraint to prevent overeager gcc optimisation
  mac_esp: rename irq
  mac_scsi: dont enable mac_scsi irq before requesting it
  macfb: fix black and white modes
  m68k/irq: Remove obsolete IRQ_FLG_* definitions

Fix up trivial conflict in arch/m68k/kernel/process_mm.c as per Geert.
</content>
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<pre>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
  m68k: Fix assembler constraint to prevent overeager gcc optimisation
  mac_esp: rename irq
  mac_scsi: dont enable mac_scsi irq before requesting it
  macfb: fix black and white modes
  m68k/irq: Remove obsolete IRQ_FLG_* definitions

Fix up trivial conflict in arch/m68k/kernel/process_mm.c as per Geert.
</pre>
</div>
</content>
</entry>
<entry>
<title>m68k: Fix assembler constraint to prevent overeager gcc optimisation</title>
<updated>2012-01-22T13:50:20+00:00</updated>
<author>
<name>Andreas Schwab</name>
<email>schwab@linux-m68k.org</email>
</author>
<published>2012-01-09T14:10:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2a3535069e33d8b416f406c159ce924427315303'/>
<id>2a3535069e33d8b416f406c159ce924427315303</id>
<content type='text'>
Passing the address of a variable as an operand to an asm statement
doesn't mark the value of this variable as used, so gcc may optimize its
initialisation away.  Fix this by using the "m" constraint instead.

Signed-off-by: Andreas Schwab &lt;schwab@linux-m68k.org&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Cc: stable@vger.kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Passing the address of a variable as an operand to an asm statement
doesn't mark the value of this variable as used, so gcc may optimize its
initialisation away.  Fix this by using the "m" constraint instead.

Signed-off-by: Andreas Schwab &lt;schwab@linux-m68k.org&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Cc: stable@vger.kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>m68k: add ColdFire with MMU enabled support to the m68k mem init code</title>
<updated>2011-12-30T00:20:48+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-10-19T10:17:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fbe3364ac4fa82caa585f98e4a525946d2cc21f4'/>
<id>fbe3364ac4fa82caa585f98e4a525946d2cc21f4</id>
<content type='text'>
The ColdFire has similar setup requirements to the SUN3 code, so we
use that.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The ColdFire has similar setup requirements to the SUN3 code, so we
use that.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>m68k: compile appropriate mm arch files for ColdFire MMU support</title>
<updated>2011-12-30T00:20:39+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-10-18T06:26:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0e6782c880e921106de645554939a5a714d8c865'/>
<id>0e6782c880e921106de645554939a5a714d8c865</id>
<content type='text'>
Create a config symbol to enable when using a ColdFire MMU. We then
use that to only compile the necessary arch mm files.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Create a config symbol to enable when using a ColdFire MMU. We then
use that to only compile the necessary arch mm files.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>m68k: ColdFire V4e MMU paging init code and miss handler</title>
<updated>2011-12-30T00:20:38+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-10-18T06:24:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=066bf87b5c1b87f2eba7880b125f88e4f67e1c16'/>
<id>066bf87b5c1b87f2eba7880b125f88e4f67e1c16</id>
<content type='text'>
The different ColdFire V4e MMU requires its own dedicated paging init
code, and a TLB miss handler for its software driven TLB.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The different ColdFire V4e MMU requires its own dedicated paging init
code, and a TLB miss handler for its software driven TLB.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>m68k: use ColdFire MMU read/write bit flags when ioremapping</title>
<updated>2011-12-30T00:20:37+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-10-18T06:16:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d49316e84bbad307543c50be53555ca9a768f31d'/>
<id>d49316e84bbad307543c50be53555ca9a768f31d</id>
<content type='text'>
The ColdFire MMU has separate read and write bits, unlike the Motorola
m68k MMU which has a single read-only bit.

Define a _PAGE_READWRITE value for the Motorola MMU, which is 0, so we
can unconditionaly include that in the page table entry bits when setting
up ioremapped pages.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The ColdFire MMU has separate read and write bits, unlike the Motorola
m68k MMU which has a single read-only bit.

Define a _PAGE_READWRITE value for the Motorola MMU, which is 0, so we
can unconditionaly include that in the page table entry bits when setting
up ioremapped pages.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>m68k: modify cache push and clear code for ColdFire with MMU enable</title>
<updated>2011-12-30T00:20:36+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-10-18T06:07:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=60610192559d430dd24d9b508ae9d8d249709af9'/>
<id>60610192559d430dd24d9b508ae9d8d249709af9</id>
<content type='text'>
The cache push and clear code only need to flush the branch cache on
the write-through cache setup of the ColdFire V4e with MMU enabled.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The cache push and clear code only need to flush the branch cache on
the write-through cache setup of the ColdFire V4e with MMU enabled.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>m68k: add cache support for V4e ColdFire cores running with MMU enabled</title>
<updated>2011-12-30T00:20:28+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-10-17T04:38:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ae2eca724af2802739efe02b3fc56daa8b674eb9'/>
<id>ae2eca724af2802739efe02b3fc56daa8b674eb9</id>
<content type='text'>
Add code to deal with instruction, data and branch caches of the V4e
ColdFire cores when they are running with the MMU enabled.

This code is loosely based on Freescales changes for the caches of the
V4e ColdFire in the 2.6.25 kernel BSP. That code was originally by
Kurt Mahan &lt;kmahan@freescale.com&gt; (now &lt;kmahan@xmission.com&gt;).

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add code to deal with instruction, data and branch caches of the V4e
ColdFire cores when they are running with the MMU enabled.

This code is loosely based on Freescales changes for the caches of the
V4e ColdFire in the 2.6.25 kernel BSP. That code was originally by
Kurt Mahan &lt;kmahan@freescale.com&gt; (now &lt;kmahan@xmission.com&gt;).

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Matt Waddel &lt;mwaddel@yahoo.com&gt;
Acked-by: Kurt Mahan &lt;kmahan@xmission.com&gt;
</pre>
</div>
</content>
</entry>
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