linux-toradex.git/arch/mips/alchemy/devboards/bcsr.c, branch v3.0.84 Linux kernel for Apalis and Colibri modules MIPS: Convert the irq functions to the new names 2011-03-29T12:48:07+00:00 Thomas Gleixner tglx@linutronix.de 2011-03-27T13:19:28+00:00 e4ec7989b4e55d9275ebac66230b7dac6dcb1fae Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> 
Scripted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
MIPS: Alchemy: Convert to new irq chip functions 2011-03-25T17:45:14+00:00 Thomas Gleixner tglx@linutronix.de 2011-03-23T21:08:44+00:00 d24c1a26ca952264d92ccf6acafe38912e05b1f8 Fix the deadlock in set_type() while at it: The code called set_irq_chip_and_handler_name() resp. set_irq_chip() from the set_type() callback. That only works on UP and lock debugging disabled. Otherwise it would dead lock on desc->lock. __irq_set_chip_handler_name_locked() avoids that. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2173/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Fix the deadlock in set_type() while at it:

The code called set_irq_chip_and_handler_name() resp. set_irq_chip()
from the set_type() callback. That only works on UP and lock debugging
disabled. Otherwise it would dead lock on desc->lock.

__irq_set_chip_handler_name_locked() avoids that.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2173/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Add missing #inclusions of <linux/irq.h> 2010-10-07T13:08:54+00:00 David Howells dhowells@redhat.com 2010-10-07T13:08:54+00:00 ca4d3e6746bdcfccb517349bce2d2c5b5614fb6f Add missing #inclusions of <linux/irq.h> to a whole bunch of files that should really include it. Note that this can replace #inclusions of <asm/irq.h>. This is required for the patch to sort out irqflags handling function naming to compile on MIPS. The problem is that these files require access to things like setup_irq() - which isn't available by #including <linux/interrupt.h> Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> 
Add missing #inclusions of <linux/irq.h> to a whole bunch of files that should
really include it.  Note that this can replace #inclusions of <asm/irq.h>.

This is required for the patch to sort out irqflags handling function naming to
compile on MIPS.

The problem is that these files require access to things like setup_irq() -
which isn't available by #including <linux/interrupt.h>

Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Alchemy: devboards: factor out PB1200 IRQ cascade code. 2010-02-27T11:52:50+00:00 Manuel Lauss manuel.lauss@googlemail.com 2009-10-04T12:55:25+00:00 95a437966dba642870a93d16bf82af8926bb2082 Move the PB1200 IRQ cascade code out to the BCSR support code: upcoming DB1300 support can use it too. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Move the PB1200 IRQ cascade code out to the BCSR support code:
upcoming DB1300 support can use it too.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Alchemy: devboard register abstraction 2010-02-27T11:52:50+00:00 Manuel Lauss manuel.lauss@googlemail.com 2009-10-04T12:55:24+00:00 9bdcf336d0c061e77f4c45c7b2bc32e3ed6b57e3 All Alchemy development boards have external CPLDs with a few registers in them. They all share an identical register layout with only a few minor differences (except the PB1000) in bit functions and base addresses. This patch - adds a primitive facility to initialize and use these external registers, - replaces all occurrences of bcsr->xxx accesses with calls to the new functions (the pb1200 cascade irq handling code is special). - collects BCSR register information scattered throughout the board headers in a central place. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
All Alchemy development boards have external CPLDs with a few registers
in them.  They all share an identical register layout with only a few
minor differences (except the PB1000) in bit functions and base
addresses.

This patch
- adds a primitive facility to initialize and use these external
  registers,
- replaces all occurrences of bcsr->xxx accesses with calls to the new
  functions (the pb1200 cascade irq handling code is special).
- collects BCSR register information scattered throughout the board
  headers in a central place.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>