linux-toradex.git/arch/mips/ath79, branch v4.2.7

MIPS: ath79: Fix the DDR control initialization on ar71xx and ar934x

2015-12-09T19:31:09+00:00

commit 5011a7e808c9fec643d752c5a495a48f27268a48 upstream.

The DDR control initialization needs to know the SoC type, however
ath79_detect_sys_type() was called after ath79_ddr_ctrl_init().
Reverse the order to fix the DDR control initialization on ar71xx and
ar934x.

Signed-off-by: Alban Bedel 
Cc: Felix Fietkau 
Cc: Qais Yousef 
Cc: Andrew Bresticker 
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11500/
Signed-off-by: Ralf Baechle 
Signed-off-by: Greg Kroah-Hartman

MIPS: Export get_c0_perfcount_int()

2015-08-03T07:25:18+00:00

get_c0_perfcount_int is tested from oprofile code. If oprofile is
compiled as module, get_c0_perfcount_int needs to be exported, otherwise
it cannot be resolved.

Fixes: a669efc4a3b4 ("MIPS: Add hook to get C0 performance counter interrupt")
Cc: stable@vger.kernel.org # v3.19+
Signed-off-by: Felix Fietkau 
Cc: linux-mips@linux-mips.org
Cc: abrestic@chromium.org
Patchwork: https://patchwork.linux-mips.org/patch/10763/
Signed-off-by: Ralf Baechle

MIPS: Add basic support for the TL-WR1043ND version 1

2015-06-21T19:54:10+00:00

Add a DTS for TL-WR1043ND version 1 and allow to have it built in the
kernel to circumvent the broken u-boot found on these boards.
Currently only the UART, LEDs and buttons are supported.

Signed-off-by: Alban Bedel 
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle

MIPS: ath79: Add OF support to the GPIO driver

2015-06-21T19:54:09+00:00

Replace the simple GPIO chip registration by a platform driver
and make ath79_gpio_init() just register the device.

Signed-off-by: Alban Bedel 
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle

MIPS: ath79: Add OF support to the clocks

2015-06-21T19:54:06+00:00

Allow using the SoC clocks in the device tree.

Signed-off-by: Alban Bedel 
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle

MIPS: ath79: Add OF support to the IRQ controllers

2015-06-21T19:54:03+00:00

Add OF support for the CPU and MISC interrupt controllers of most
supported ATH79 devices.

Signed-off-by: Alban Bedel 
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle

MIPS: ath79: Add basic device tree support

2015-06-21T19:54:01+00:00

Add the bare minimum to load a device tree.

Signed-off-by: Alban Bedel 
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle

MIPS: ath79: Use the common clk API

2015-06-21T19:53:51+00:00

Make the code simpler and open the way for device tree clocks.

[ralf@linux-mips.org: Resolved conflict with 2a552da6 (MIPS/IRQCHIP: Move
irq_chip from arch/mips to drivers/irqchip.)]

Signed-off-by: Alban Bedel 
Cc: linux-mips@linux-mips.org
Cc: Andrew Bresticker 
Cc: Qais Yousef 
Cc: Wolfram Sang 
Cc: Sergey Ryazanov 
Cc: Gabor Juhos 
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9774/
Signed-off-by: Ralf Baechle

MIPS: ath79: Improve the DDR controller interface

2015-06-21T19:53:51+00:00

The DDR controller need to be used by the IRQ controller to flush
the write buffer of some devices before running the IRQ handler.
It is also used by the PCI controller to setup the PCI memory windows.

The current interface used to access the DDR controller doesn't
provides any useful abstraction and simply rely on a shared global
pointer.

Replace this by a simple API to setup the PCI memory windows and use
the write buffer flush independently of the SoC type. That remove the
need for the shared global pointer, simplify the IRQ handler code.

[ralf@linux-mips.org: Folded in Alban Bedel's follup fix.]

Signed-off-by: Alban Bedel 
Cc: linux-mips@linux-mips.org
Cc: Andrew Bresticker 
Cc: Qais Yousef 
Cc: Wolfram Sang 
Cc: Sergey Ryazanov 
Cc: Gabor Juhos 
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9773/
Patchwork: http://patchwork.linux-mips.org/patch/10543/
Signed-off-by: Ralf Baechle

MIPS: ath79: Correctly name the defines for the PLL_FB register

2015-06-21T19:53:49+00:00

This register is named PLL_FB and is not a divider but a multiplier.
To make things less confusing rename the ARxxxx_PLL_DIV_SHIFT and
ARxxxx_PLL_DIV_MASK macros to ARxxxx_PLL_FB_SHIFT and
ARxxxx_PLL_FB_MASK.

Signed-off-by: Alban Bedel 
Cc: linux-mips@linux-mips.org
Cc: Andrew Bresticker 
Cc: Qais Yousef 
Cc: Wolfram Sang 
Cc: Sergey Ryazanov 
Cc: Gabor Juhos 
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9772/
Signed-off-by: Ralf Baechle