linux-toradex.git/arch/mips/bcm63xx, branch v4.0.4

MIPS: BCM63xx: Move bcm63xx_gpio_init() to bcm63xx_register_devices().

2015-05-13T12:14:18+00:00

Commit 2ec459f2a77b808c1e5a3616c88b613d3f720c8d upstream.

When called from prom init code, bcm63xx_gpio_init() will fail as it
will call gpiochip_add() which relies on a working kmalloc() to alloc
the gpio_desc array and kmalloc is not useable yet at prom init time.

Move bcm63xx_gpio_init() to bcm63xx_register_devices() (an
arch_initcall) where kmalloc works.

Fixes: 14e85c0e69d5 ("gpio: remove gpio_descs global array")

Signed-off-by: Nicolas Schichan 
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Alexandre Courbot 
Patchwork: https://patchwork.linux-mips.org/patch/9530/
Signed-off-by: Ralf Baechle 
Signed-off-by: Greg Kroah-Hartman

MIPS: Remove useless parentheses

2014-11-24T06:44:49+00:00

Based on the spatch

@@
expression e;
@@
- return (e);
+ return e;

with heavy hand editing because some of the changes are either whitespace
or identation only or result in excessivly long lines.

Signed-off-by: Ralf Baechle

MIPS: BCM63xx: delete double assignment

2014-08-26T00:18:58+00:00

Delete successive assignments to the same location.  In each case, the
duplicated assignment is modified to be in line with other nearby code.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// 
@@
expression i;
@@

*i = ...;
 i = ...;
// 

Signed-off-by: Julia Lawall 
Cc: joe@perches.com
Cc: kernel-janitors@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7565/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Allow setting affinity for IPIC

2014-07-30T13:30:23+00:00

Wire up the set_affinity call for the internal PIC if booting on
a cpu supporting it.
Affinity is kept to boot cpu as default.

Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Cc: Kevin Cernekee 
Cc: Gregory Fong 
Patchwork: https://patchwork.linux-mips.org/patch/7323/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Use irq_desc as argument for (un)mask

2014-07-30T13:29:59+00:00

In preparation for applying affinity, use the irq descriptor as the
argument for (un)mask.

Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Cc: Kevin Cernekee 
Cc: Gregory Fong 
Patchwork: https://patchwork.linux-mips.org/patch/7317/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Wire up the second cpu's irq line

2014-07-30T13:29:41+00:00

Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Cc: Kevin Cernekee 
Cc: Gregory Fong 
Patchwork: https://patchwork.linux-mips.org/patch/7322/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Protect irq register accesses

2014-07-30T13:29:23+00:00

Since we will have the chance of accessing the registers concurrently,
protect any accesses through a spinlock.

Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Cc: Kevin Cernekee 
Cc: Gregory Fong 
Patchwork: https://patchwork.linux-mips.org/patch/7321/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Add cpu argument to dispatch internal

2014-07-30T13:29:00+00:00

Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Cc: Kevin Cernekee 
Cc: Gregory Fong 
Patchwork: https://patchwork.linux-mips.org/patch/7320/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Populate irq_{stat,mask}_addr for second cpu

2014-07-30T13:28:34+00:00

Set it to zero if there is no second set.

Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Cc: Kevin Cernekee 
Cc: Gregory Fong 
Patchwork: https://patchwork.linux-mips.org/patch/7319/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Append irq line to irq_{stat,mask}*

2014-07-30T13:28:11+00:00

The SMP capable irq controllers have two interrupt output pins which are
controlled through separate registers, so make the variables arrays.

Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Cc: Kevin Cernekee 
Cc: Gregory Fong 
Patchwork: https://patchwork.linux-mips.org/patch/7318/
Signed-off-by: Ralf Baechle