linux-toradex.git/arch/mips/boot/dts/loongson, branch master Linux kernel for Apalis and Colibri modules MIPS: Loongson64: dts: Add node for LS7A PCH LPC 2026-05-26T14:39:42+00:00 Icenowy Zheng zhengxingda@iscas.ac.cn 2026-04-11T10:17:44+00:00 8b498817d62c3e6c4ded294e8822159ea9a9a1f0 Loongson 7A series PCH contain a LPC IRQ controller. Add the device tree node of it. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Loongson 7A series PCH contain a LPC IRQ controller.

Add the device tree node of it.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: Loongson64: dts: Sort nodes 2026-05-26T14:39:42+00:00 Icenowy Zheng zhengxingda@iscas.ac.cn 2026-04-11T10:17:43+00:00 62d6592cb28882bc693df6c04276ebf41c931013 The RTC's address is after UARTs, however the node is currently before them. Re-order the node to match address sequence. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
The RTC's address is after UARTs, however the node is currently before
them.

Re-order the node to match address sequence.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: dts: loongson64g-package: Switch to Loongson UART driver 2026-04-06T12:14:24+00:00 Rong Zhang rongrong@oss.cipunited.com 2026-03-15T18:44:00+00:00 79b888ee4c6387bc07c5452bfd031cb985871a5f Loongson64g is Loongson 3A4000, whose UART controller is compatible with Loongson 2K1500, which is NS16550A-compatible with an additional fractional frequency divisor register. Update the compatible strings to reflect this, so that 3A4000 can benefit from the fractional frequency divisor provided by loongson-uart. This is required on some devices, otherwise their UART can't work at some high baud rates, e.g., 115200. Tested on Loongson-LS3A4000-7A1000-NUC-SE with a 25MHz UART clock. Without fractional frequency divisor, the actual baud rate was 111607 (25MHz / 16 / 14, measured value: 111545) and some USB-to-UART converters couldn't work with it at all. With fractional frequency divisor, the measured baud rate becomes 115207, which is quite accurate. Signed-off-by: Rong Zhang <rongrong@oss.cipunited.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Loongson64g is Loongson 3A4000, whose UART controller is compatible with
Loongson 2K1500, which is NS16550A-compatible with an additional
fractional frequency divisor register.

Update the compatible strings to reflect this, so that 3A4000 can
benefit from the fractional frequency divisor provided by loongson-uart.
This is required on some devices, otherwise their UART can't work at
some high baud rates, e.g., 115200.

Tested on Loongson-LS3A4000-7A1000-NUC-SE with a 25MHz UART clock.
Without fractional frequency divisor, the actual baud rate was 111607
(25MHz / 16 / 14, measured value: 111545) and some USB-to-UART
converters couldn't work with it at all. With fractional frequency
divisor, the measured baud rate becomes 115207, which is quite accurate.

Signed-off-by: Rong Zhang <rongrong@oss.cipunited.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: Loongson64: dts: fix phy-related definition of LS7A GMAC 2026-01-30T14:35:26+00:00 Icenowy Zheng zhengxingda@iscas.ac.cn 2026-01-02T15:52:43+00:00 e4ec36bf7bc7023e1d207b1277755b0da381f20f Currently the LS7A GMAC device tree node lacks a proper phy-handle property pointing to the PHY node. In addition, the phy-mode property specifies "rgmii" without any internal delay information, which means the board trace needs to add 2ns delay to the RGMII data lines; but that isn't known to happen on any Loongson board. The ACPI-based initialization codepath, which is used on LoongArch-based 3A5000 + 7A1000 hardwares, specifies "rgmii-id" phy mode, which should be the one we are using. Add the lacking phy-handle property and set proper phy-mode. Tested on a LS3A4000_7A1000_NUC_BOARD_V2.1 board with YT8521S PHY. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Currently the LS7A GMAC device tree node lacks a proper phy-handle
property pointing to the PHY node.

In addition, the phy-mode property specifies "rgmii" without any
internal delay information, which means the board trace needs to add 2ns
delay to the RGMII data lines; but that isn't known to happen on any
Loongson board. The ACPI-based initialization codepath, which is used on
LoongArch-based 3A5000 + 7A1000 hardwares, specifies "rgmii-id" phy
mode, which should be the one we are using.

Add the lacking phy-handle property and set proper phy-mode.

Tested on a LS3A4000_7A1000_NUC_BOARD_V2.1 board with YT8521S PHY.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: loongson: Add built-in DTB support 2025-08-29T20:34:31+00:00 Keguang Zhang keguang.zhang@gmail.com 2025-07-16T11:25:15+00:00 ec7c2a107a59a60079eff3308e791a3441231f2e Since the current bootloader for Loongson-1 does not support FDT, introduce CONFIG_BUILTIN_DTB_NAME to enable a built-in DTB. Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Since the current bootloader for Loongson-1 does not support FDT,
introduce CONFIG_BUILTIN_DTB_NAME to enable a built-in DTB.

Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: dts: loongson: Add CQ-T300B board 2025-08-29T20:34:31+00:00 Keguang Zhang keguang.zhang@gmail.com 2025-07-16T11:25:14+00:00 11741215e287454bd4c6e9a4872790a1a2c0e0ae Add a device tree for CQ-T300B board. Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Add a device tree for CQ-T300B board.

Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: dts: loongson: Add Smartloong-1C board 2025-08-29T20:34:31+00:00 Keguang Zhang keguang.zhang@gmail.com 2025-07-16T11:25:13+00:00 cf4b382a92f4fea09f5987e5757b4979fd255cb2 Add a device tree for Smartloong-1C board, supporting CPU, clock, INTC, UART, Ethernet, GPIO, USB host, RTC, watchdog, DMA, and NAND. Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Add a device tree for Smartloong-1C board, supporting CPU, clock, INTC,
UART, Ethernet, GPIO, USB host, RTC, watchdog, DMA, and NAND.

Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: dts: loongson: Add LSGZ_1B_DEV board 2025-08-29T20:34:31+00:00 Keguang Zhang keguang.zhang@gmail.com 2025-07-16T11:25:12+00:00 9c607077294a25bd597cfcfb3f832707b5b88426 Add a device tree for LSGZ_1B_DEV board. Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Add a device tree for LSGZ_1B_DEV board.

Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: dts: loongson: Add LS1B-DEMO board 2025-08-29T20:34:30+00:00 Keguang Zhang keguang.zhang@gmail.com 2025-07-16T11:25:11+00:00 6428fcf27f0248b076b381408c98102f88564926 Add a device tree for LS1B-DEMO board, supporting CPU, clock, INTC, UART, Ethernet, GPIO, USB host, RTC, watchdog, DMA, NAND, and AC97. Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Add a device tree for LS1B-DEMO board, supporting CPU, clock, INTC,
UART, Ethernet, GPIO, USB host, RTC, watchdog, DMA, NAND, and AC97.

Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: Loongson64: Add missing '#interrupt-cells' for loongson64c_ls7a 2025-04-27T07:36:32+00:00 WangYuli wangyuli@uniontech.com 2025-04-16T03:45:48+00:00 6d223b8ffcd1593d032b71875def2daa71c53111 Similar to commit 98a9e2ac3755 ("MIPS: Loongson64: DTS: Fix msi node for ls7a"). Fix follow warnings: arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts:28.31-36.4: Warning (interrupt_provider): /bus@10000000/msi-controller@2ff00000: Missing '#interrupt-cells' in interrupt provider arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider' Fixes: 24af105962c8 ("MIPS: Loongson64: DeviceTree for LS7A PCH") Tested-by: WangYuli <wangyuli@uniontech.com> Signed-off-by: WangYuli <wangyuli@uniontech.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Similar to commit 98a9e2ac3755 ("MIPS: Loongson64: DTS: Fix msi node for ls7a").

Fix follow warnings:
  arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts:28.31-36.4: Warning (interrupt_provider): /bus@10000000/msi-controller@2ff00000: Missing '#interrupt-cells' in interrupt provider
  arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider'

Fixes: 24af105962c8 ("MIPS: Loongson64: DeviceTree for LS7A PCH")
Tested-by: WangYuli <wangyuli@uniontech.com>
Signed-off-by: WangYuli <wangyuli@uniontech.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>