<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/mips/emma, branch v4.2.7</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>MIPS: Remove panic_timeout settings</title>
<updated>2013-11-26T11:12:27+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-11-25T23:23:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7972e966b032939afe63d8db22975240879dfd2a'/>
<id>7972e966b032939afe63d8db22975240879dfd2a</id>
<content type='text'>
Now that we have a CONFIG_PANIC_TIMEOUT=x setting, remove the
mips settings. The default is 0, which means don't reboot on
panic.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Acked-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;
Signed-off-by: Jason Baron &lt;jbaron@akamai.com&gt;
Cc: benh@kernel.crashing.org
Cc: paulus@samba.org
Cc: mpe@ellerman.id.au
Cc: felipe.contreras@gmail.com
Cc: linux-mips@linux-mips.org
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/d19dc75fca343ec5d9ada75a1400f57330021976.1385418410.git.jbaron@akamai.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that we have a CONFIG_PANIC_TIMEOUT=x setting, remove the
mips settings. The default is 0, which means don't reboot on
panic.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Acked-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;
Signed-off-by: Jason Baron &lt;jbaron@akamai.com&gt;
Cc: benh@kernel.crashing.org
Cc: paulus@samba.org
Cc: mpe@ellerman.id.au
Cc: felipe.contreras@gmail.com
Cc: linux-mips@linux-mips.org
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/d19dc75fca343ec5d9ada75a1400f57330021976.1385418410.git.jbaron@akamai.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Whitespace cleanup.</title>
<updated>2013-02-01T09:00:22+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-01-22T11:59:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7034228792cc561e79ff8600f02884bd4c80e287'/>
<id>7034228792cc561e79ff8600f02884bd4c80e287</id>
<content type='text'>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Disintegrate asm/system.h for MIPS</title>
<updated>2012-03-28T17:30:02+00:00</updated>
<author>
<name>David Howells</name>
<email>dhowells@redhat.com</email>
</author>
<published>2012-03-28T17:30:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b81947c646bfefdf98e2fde5d7d39cbbda8525d4'/>
<id>b81947c646bfefdf98e2fde5d7d39cbbda8525d4</id>
<content type='text'>
Disintegrate asm/system.h for MIPS.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
cc: linux-mips@linux-mips.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Disintegrate asm/system.h for MIPS.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
cc: linux-mips@linux-mips.org
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Yosemite, Emma: Fix off-by-two in arcs_cmdline buffer size check</title>
<updated>2011-11-08T12:35:29+00:00</updated>
<author>
<name>Thomas Jarosch</name>
<email>thomas.jarosch@intra2net.com</email>
</author>
<published>2011-10-29T13:45:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=617d1017545c27a56229483cc1d689eff6c38561'/>
<id>617d1017545c27a56229483cc1d689eff6c38561</id>
<content type='text'>
Cause is a misplaced bracket.

The code

    strlen(buf+1)

will be two bytes less than

    strlen(buf)+1

The +1 is in this code to reserve space for an additional space character.

[ralf@linux-mips.org: Thomas' original patch fixed the issue only for
 Yosemite but the same bug exists also in Emma.]

Signed-off-by: Thomas Jarosch &lt;thomas.jarosch@intra2net.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/2861/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Cause is a misplaced bracket.

The code

    strlen(buf+1)

will be two bytes less than

    strlen(buf)+1

The +1 is in this code to reserve space for an additional space character.

[ralf@linux-mips.org: Thomas' original patch fixed the issue only for
 Yosemite but the same bug exists also in Emma.]

Signed-off-by: Thomas Jarosch &lt;thomas.jarosch@intra2net.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/2861/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD</title>
<updated>2011-09-21T15:52:15+00:00</updated>
<author>
<name>Wu Zhangjin</name>
<email>wuzhangjin@gmail.com</email>
</author>
<published>2011-07-23T12:41:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5a4a4ad851dd8db2d888fb86c8bd946b2ae79f60'/>
<id>5a4a4ad851dd8db2d888fb86c8bd946b2ae79f60</id>
<content type='text'>
Mark interrupts with no_action handler, cascade interrupts, low level
interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them
from forced threading.

Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Mark interrupts with no_action handler, cascade interrupts, low level
interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them
from forced threading.

Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Convert the irq functions to the new names</title>
<updated>2011-03-29T12:48:07+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2011-03-27T13:19:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e4ec7989b4e55d9275ebac66230b7dac6dcb1fae'/>
<id>e4ec7989b4e55d9275ebac66230b7dac6dcb1fae</id>
<content type='text'>
Scripted with coccinelle.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Scripted with coccinelle.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: EMMA: Convert to new irq_chip functions</title>
<updated>2011-03-25T17:45:15+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2011-03-23T21:08:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=90a568f7bb9eab60958d47903f4c655cd9935148'/>
<id>90a568f7bb9eab60958d47903f4c655cd9935148</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2179/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2179/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Ritually kill stupid printk.</title>
<updated>2010-08-05T12:26:27+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2010-08-05T12:26:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d7674c4f5899712a262d4946ca6edaa947148f52'/>
<id>d7674c4f5899712a262d4946ca6edaa947148f52</id>
<content type='text'>
This belongs into userland.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This belongs into userland.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: EMMA2RH: Remove EMMA2RH_CPU_CASCADE</title>
<updated>2010-08-05T12:26:04+00:00</updated>
<author>
<name>Shinya Kuribayashi</name>
<email>shinya.kuribayashi.px@renesas.com</email>
</author>
<published>2010-06-17T11:36:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9e6f39698ac66e08017114a51600bf633becd011'/>
<id>9e6f39698ac66e08017114a51600bf633becd011</id>
<content type='text'>
Although all EMMAxxx SoCs can support IP2 and IP3 hardware interrupts,
current EMMA2RH plat_irq_dispatch() supports IP2 only.  We can make it
configurable in the future, but for the time being, would like to make
things explicitly allcated to IP2 in accordance with plat_irq_dispatch().

Signed-off-by: Shinya Kuribayashi &lt;shinya.kuribayashi.px@renesas.com&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1388/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Although all EMMAxxx SoCs can support IP2 and IP3 hardware interrupts,
current EMMA2RH plat_irq_dispatch() supports IP2 only.  We can make it
configurable in the future, but for the time being, would like to make
things explicitly allcated to IP2 in accordance with plat_irq_dispatch().

Signed-off-by: Shinya Kuribayashi &lt;shinya.kuribayashi.px@renesas.com&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1388/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: EMMA2RH: Remove useless CPU_IRQ_BASE</title>
<updated>2010-08-05T12:26:03+00:00</updated>
<author>
<name>Shinya Kuribayashi</name>
<email>shinya.kuribayashi.px@renesas.com</email>
</author>
<published>2010-06-17T11:35:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=eebacda40f2f9818c92f61b2228c7888e1f4926c'/>
<id>eebacda40f2f9818c92f61b2228c7888e1f4926c</id>
<content type='text'>
For historical reasons, we used to put MIPS CPU IRQs behind SoC-specific
IRQs in the queue, and have been using CPU_IRQ_BASE as MIPS_CPU_IRQ_BASE.
In recent years, however, we've brought it back to normal order, and now
CPU_IRQ_BASE just redefines the generic MIPS_CPU_IRQ_BASE.

At the same time, NUM_CPU_IRQ is also removed as useless.

Signed-off-by: Shinya Kuribayashi &lt;shinya.kuribayashi.px@renesas.com&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1387/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For historical reasons, we used to put MIPS CPU IRQs behind SoC-specific
IRQs in the queue, and have been using CPU_IRQ_BASE as MIPS_CPU_IRQ_BASE.
In recent years, however, we've brought it back to normal order, and now
CPU_IRQ_BASE just redefines the generic MIPS_CPU_IRQ_BASE.

At the same time, NUM_CPU_IRQ is also removed as useless.

Signed-off-by: Shinya Kuribayashi &lt;shinya.kuribayashi.px@renesas.com&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1387/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
