linux-toradex.git/arch/mips/include/asm/bootinfo.h, branch v5.18

MIPS: Ingenic: Add system type for new Ingenic SoCs.

2021-07-19T11:16:42+00:00

Add JZ4730, JZ4750, JZ4755, JZ4760, JZ4760B, X2000H, and X2100 system
type for cat /proc/cpuinfo to give out JZ4730, JZ4750, JZ4755, JZ4760,
JZ4760B, X2000H, and X2100.

Signed-off-by: 周琰杰 (Zhou Yanjie) 
Reviewed-by: Paul Cercueil 
Signed-off-by: Thomas Bogendoerfer

mips/bootinfo:correct some comments of fw_arg

2021-04-21T11:46:47+00:00

from arch/mips/kernel/head.S we know that use a0~a3 for fw_arg0~fw_arg3
there is some code from head.S:
	LONG_S		a0, fw_arg0		# firmware arguments
	LONG_S		a1, fw_arg1
	LONG_S		a2, fw_arg2
	LONG_S		a3, fw_arg3

Signed-off-by: xiaochuan mao 
Signed-off-by: Thomas Bogendoerfer

MIPS: of: Introduce helper function to get DTB

2021-02-04T12:34:51+00:00

Selection of the DTB to be used was burried in more or less readable
code in head.S. Move this code into a inline helper function and
use it.

Signed-off-by: Thomas Bogendoerfer 
Acked-by: Florian Fainelli

MIPS: replace add_memory_region with memblock

2020-10-12T10:01:36+00:00

add_memory_region was the old interface for registering memory and
was already changed to used memblock internaly. Replace it by
directly calling memblock functions.

Signed-off-by: Thomas Bogendoerfer

MIPS: Ingenic: Add system type for new Ingenic SoCs.

2020-09-27T08:57:27+00:00

Add JZ4775, X1000E, X2000, and X2000E system type for cat /proc/cpuinfo
to give out JZ4775, X1000E, X2000 and X2000E.

Signed-off-by: 周琰杰 (Zhou Yanjie) 
Reviewed-by: Paul Cercueil 
Signed-off-by: Thomas Bogendoerfer

MIPS: X2000: Add X2000 system type.

2020-07-24T09:13:57+00:00

1.Add "PRID_COMP_INGENIC_13" and "PRID_IMP_XBURST2" for X2000.
2.Add X2000 system type for cat /proc/cpuinfo to give out X2000.

Signed-off-by: 周琰杰 (Zhou Yanjie) 
Signed-off-by: Thomas Bogendoerfer

MIPS: ingenic: Use enum instead of macros for Ingenic SoCs

2020-07-16T08:47:30+00:00

Use an enum instead of macros to represent the various versions of the
Ingenic SoCs, and add some of the SoC versions that were previously
missing.

Signed-off-by: Paul Cercueil 
Signed-off-by: Thomas Bogendoerfer

MIPS: Remove PMC MSP71xx platform

2020-05-09T16:05:52+00:00

No (active) developer owns this hardware, so let's remove Linux support.

Signed-off-by: Thomas Bogendoerfer

MIPS: Cleanup code about plat_mem_setup()

2020-04-21T14:07:14+00:00

In the current code, plat_mem_setup() is called by arch_mem_init() instead
of setup_arch() and has been declared in asm/bootinfo.h, so modify the code
comment to reflect the reality and remove the useless duplicate declartion
in arch/mips/kernel/setup.c.

Signed-off-by: Tiezhu Yang 
Signed-off-by: Thomas Bogendoerfer

MIPS: X1830: Add X1830 system type.

2020-01-09T17:48:42+00:00

1.Add X1830 system type for cat /proc/cpuinfo to give out X1830.
2.Change "PRID_IMP_XBURST" to "PRID_IMP_XBURST_REV1" and add a
  new "PRID_IMP_XBURST_REV2" for new Ingenic CPUs which has
  XBurst with MXU2 SIMD ISA.

Notice:
1."PRID_IMP_XBURST_REV2" is corresponds to the latest XBurst
  processor with 128bit MXU2 SIMD instruction set, not the upcoming
  XBurst2 processor. This version of the processors fixes issues
  such as BTB and HPTLB.
2.In order to simplify and reuse the code, the "c->cputype" and
  the "c->writecombine" and the "__cpu_name[cpu]" in the original
  "PRID_IMP_XBURST" (now is "PRID_IMP_XBURST_REV1") are removed,
  and the corresponding settings are abtained through fall-through
  to "PRID_IMP_XBURST_REV2", which will cause the name that was
  previously mistakenly called "JZRISC" to become to the real name
  "XBurst".

Signed-off-by: 周琰杰 (Zhou Yanjie) 
Signed-off-by: Paul Burton 
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: yamada.masahiro@socionext.com
Cc: tglx@linutronix.de
Cc: chenhc@lemote.com
Cc: tbogendoerfer@suse.de
Cc: paul.burton@mips.com
Cc: paul@crapouillou.net
Cc: jhogan@kernel.org
Cc: fancer.lancer@gmail.com
Cc: ralf@linux-mips.org
Cc: jiaxun.yang@flygoat.com