linux-toradex.git/arch/mips/include/asm/fpu_emulator.h, branch v3.4.56 Linux kernel for Apalis and Colibri modules MIPS: Fix build breakage if CONFIG_DEBUG_FS is enabled. 2010-04-12T16:26:08+00:00 Ralf Baechle ralf@linux-mips.org 2010-03-08T18:38:13+00:00 c948aca4f49d94b08c425f65acdaca1d679d6fa7 Caused by 38b7827fcdd660f591d645bd3ae6644456a4773c - no, cpu_local_* was not unused. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Christoph Lameter <cl@linux-foundation.org> Acked-by: David Daney <ddaney@caviumnetworks.com> 
Caused by 38b7827fcdd660f591d645bd3ae6644456a4773c - no, cpu_local_* was
not unused.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Christoph Lameter <cl@linux-foundation.org>
Acked-by: David Daney <ddaney@caviumnetworks.com>
MIPS: Collect FPU emulator statistics per-CPU. 2009-12-17T01:57:08+00:00 David Daney ddaney@caviumnetworks.com 2009-11-05T19:34:26+00:00 b6ee75ed4fa201873d3a2b32dfce2dbd701a2de4 On SMP systems, the collection of statistics can cause cache line bouncing in the lines associated with the counters. Also there are races incrementing the counters on multiple CPUs. To fix both problems, we collect the statistics in per-CPU variables, and add them up in the debugfs read operation. As a test I ran the LTP float_bessel test on a 12 CPU Octeon system. Without CONFIG_DEBUG_FS : 2602 seconds. With CONFIG_DEBUG_FS: 2640 seconds. With non-cpu-local atomic statistics: 14569 seconds. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
On SMP systems, the collection of statistics can cause cache line
bouncing in the lines associated with the counters.  Also there are
races incrementing the counters on multiple CPUs.

To fix both problems, we collect the statistics in per-CPU variables,
and add them up in the debugfs read operation.

As a test I ran the LTP float_bessel test on a 12 CPU Octeon system.

Without CONFIG_DEBUG_FS :             2602 seconds.
With CONFIG_DEBUG_FS:                 2640 seconds.
With non-cpu-local atomic statistics: 14569 seconds.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Switch FPU emulator trap to BREAK instruction. 2008-10-30T14:44:34+00:00 Ralf Baechle ralf@linux-mips.org 2008-10-28T17:38:42+00:00 ba3049ed4086737dab200b6087138a4b8e06915d Arguably using the address error handler has always been ugly. But with processors that handle unaligned loads and stores in hardware the current mechanism ceases to work so switch it to a BREAK instruction and allocate break code 514 to the FPU emulator. Yoichi Yuasa provided a build fix for CONFIG_BUG=n. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> 
Arguably using the address error handler has always been ugly.  But with
processors that handle unaligned loads and stores in hardware the
current mechanism ceases to work so switch it to a BREAK instruction and
allocate break code 514 to the FPU emulator.

Yoichi Yuasa provided a build fix for CONFIG_BUG=n.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
MIPS: Move headfiles to new location below arch/mips/include 2008-10-11T15:18:52+00:00 Ralf Baechle ralf@linux-mips.org 2008-09-16T17:48:51+00:00 384740dc49ea651ba350704d13ff6be9976e37fe Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>