linux-toradex.git/arch/mips/include/asm/irq.h, branch v3.4.53 Linux kernel for Apalis and Colibri modules irq_domain/mips: Allow irq_domain on MIPS 2012-02-24T16:47:23+00:00 Grant Likely grant.likely@secretlab.ca 2012-02-24T15:07:06+00:00 abd2363f6a5f1030b935e0bdc15cf917313b3b10 This patch makes IRQ_DOMAIN usable on MIPS. It uses an ugly workaround to preserve current behaviour so that MIPS has time to add irq_domain registration to the irq controller drivers. The workaround will be removed in Linux v3.6 Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org 
This patch makes IRQ_DOMAIN usable on MIPS.  It uses an ugly workaround
to preserve current behaviour so that MIPS has time to add irq_domain
registration to the irq controller drivers.  The workaround will be
removed in Linux v3.6

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
MIPS: Remove pointless return statement from empty void functions. 2011-07-25T16:26:55+00:00 Ralf Baechle ralf@linux-mips.org 2011-07-25T16:26:55+00:00 98f4a2c27c76e7eaf75c2f3f25487fabca62ef3d Signed-off-by: Ralf Baechle <ralf@linux-mips.org> To: Sergei Shtylyov <sshtylyov@mvista.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2391/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
To: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2391/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: SMTC: Cleanup the hook mess and use irq_data 2011-03-25T17:45:18+00:00 Thomas Gleixner tglx@linutronix.de 2011-03-23T21:09:04+00:00 930cd54b3bd78e52991a89b39b5ef58355ad2b6d Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2194/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2194/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: i8259: Convert to new irq_chip functions 2011-03-25T17:45:16+00:00 Thomas Gleixner tglx@linutronix.de 2011-03-23T21:08:57+00:00 7c8d948f1633da5ff81e4f5b31ef237d74c40127 Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2185/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2185/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
of/mips: Add device tree support to MIPS 2010-10-21T17:10:10+00:00 Dezhong Diao dediao@cisco.com 2010-10-13T06:52:46+00:00 f2ffa5ab74f4dfd598860f96ca37a71c4d0a28a8 Add the ability to enable CONFIG_OF on the MIPS architecture. Signed-off-by: Dezhong Diao <dediao@cisco.com> [grant.likely@secretlab.ca: cleared out obsolete hooks, removed ARCH_HAS_DEVTREE_MEM, remove __init tags from header file, removed debugfs support hunk] [ddaney@linux-mips.org: backed out over aggressive trimming of hooks] Acked-by: Ralf Baechle <ralf@linux-mips.org> Tested-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> 
Add the ability to enable CONFIG_OF on the MIPS architecture.

Signed-off-by: Dezhong Diao <dediao@cisco.com>
[grant.likely@secretlab.ca: cleared out obsolete hooks,
	removed ARCH_HAS_DEVTREE_MEM,
	remove __init tags from header file,
	removed debugfs support hunk]
[ddaney@linux-mips.org: backed out over aggressive trimming of hooks]
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Tested-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs 2010-01-27T23:03:31+00:00 David VomLehn dvomlehn@cisco.com 2009-12-22T01:49:22+00:00 010c108d7af708d9e09b83724a058a76803fbc66 The MIPS processor is limited to 64 external interrupt sources. Using a greater number without IRQ sharing requires reading platform-specific registers. On such platforms, reading the IntCtl register to determine which interrupt corresponds to a timer interrupt will not work. On MIPSR2 systems there is a solution - the TI bit in the Cause register, specifically indicates that a timer interrupt has occured. This patch uses that bit to detect interrupts for MIPSR2 processors, which may be expected to work regardless of how the timer interrupt may be routed in the hardware. Signed-off-by: David VomLehn (dvomlehn@cisco.com) To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/804/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
The MIPS processor is limited to 64 external interrupt sources. Using a
greater number without IRQ sharing requires reading platform-specific
registers. On such platforms, reading the IntCtl register to determine
which interrupt corresponds to a timer interrupt will not work.

On MIPSR2 systems there is a solution - the TI bit in the Cause register,
specifically indicates that a timer interrupt has occured. This patch uses
that bit to detect interrupts for MIPSR2 processors, which may be expected
to work regardless of how the timer interrupt may be routed in the hardware.

Signed-off-by: David VomLehn (dvomlehn@cisco.com)
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/804/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Tracing: Add IRQENTRY_EXIT section for MIPS 2009-12-17T01:57:24+00:00 Wu Zhangjin wuzhangjin@gmail.com 2009-11-20T12:34:33+00:00 8f99a162653531ef25a3dd0f92bfb6332cd2b295 This patch add a new section for MIPS to record the block of the hardirq handling for function graph tracer(print_graph_irq) via adding the __irq_entry annotation to the the entrypoints of the hardirqs(the block with irq_enter()...irq_exit()). Thanks goes to Steven & Frederic Weisbecker for their feedbacks. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Reviewed-by: Frederic Weisbecker <fweisbec@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/676/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
This patch add a new section for MIPS to record the block of the hardirq
handling for function graph tracer(print_graph_irq) via adding the
__irq_entry annotation to the the entrypoints of the hardirqs(the block
with irq_enter()...irq_exit()).

Thanks goes to Steven & Frederic Weisbecker for their feedbacks.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Reviewed-by: Frederic Weisbecker <fweisbec@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/676/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users. 2009-06-24T17:34:39+00:00 Ralf Baechle ralf@linux-mips.org 2009-06-19T13:05:26+00:00 631330f5847b3f8a7ea67d689e9f7c56833ccaa6 Some of the were relying into smp.h being dragged in by another header which of course is fragile. <asm/cpu-info.h> uses smp_processor_id() only in macros and including smp.h there leads to an include loop, so don't change cpu-info.h. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Some of the were relying into smp.h being dragged in by another header
which of course is fragile.  <asm/cpu-info.h> uses smp_processor_id()
only in macros and including smp.h there leads to an include loop, so
don't change cpu-info.h.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
irq: change ->set_affinity() to return status 2009-04-28T10:21:16+00:00 Yinghai Lu yinghai@kernel.org 2009-04-28T00:59:21+00:00 d5dedd4507d307eb3f35f21b6e16f336fdc0d82a according to Ingo, change set_affinity() in irq_chip should return int, because that way we can handle failure cases in a much cleaner way, in the genirq layer. v2: fix two typos [ Impact: extend API ] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: linux-arch@vger.kernel.org LKML-Reference: <49F654E9.4070809@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> 
according to Ingo, change set_affinity() in irq_chip should return int,
because that way we can handle failure cases in a much cleaner way, in
the genirq layer.

v2: fix two typos

[ Impact: extend API ]

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: linux-arch@vger.kernel.org
LKML-Reference: <49F654E9.4070809@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
irq: update all arches for new irq_desc 2009-01-12T23:27:13+00:00 Mike Travis travis@sgi.com 2009-01-12T23:27:13+00:00 e65e49d0f3714f4a6a42f6f6a19926ba33fcda75 Impact: cleanup, update to new cpumask API Irq_desc.affinity and irq_desc.pending_mask are now cpumask_var_t's so access to them should be using the new cpumask API. Signed-off-by: Mike Travis <travis@sgi.com> 
Impact: cleanup, update to new cpumask API

Irq_desc.affinity and irq_desc.pending_mask are now cpumask_var_t's
so access to them should be using the new cpumask API.

Signed-off-by: Mike Travis <travis@sgi.com>