linux-toradex.git/arch/mips/include/asm/mach-ath79, branch v4.8-rc2

irqchip/ath79-cpu: Move the CPU IRQ driver from arch/mips/ath79/

2016-02-17T13:47:19+00:00

Signed-off-by: Alban Bedel 
Acked-by: Marc Zyngier 
Link: https://lkml.kernel.org/r/1453553867-27003-2-git-send-email-albeu@free.fr
Signed-off-by: Jason Cooper

irqchip/ath79-misc: Move the MISC driver from arch/mips/ath79/

2016-02-17T13:44:31+00:00

The driver stays the same but the initialization changes a bit.
For OF boards we now get the memory map from the OF node and use
a linear mapping instead of the legacy mapping. For legacy boards
we still use a legacy mapping and just pass down all the parameters
from the board init code.

Signed-off-by: Alban Bedel 
Acked-by: Marc Zyngier 
Link: https://lkml.kernel.org/r/1453553867-27003-1-git-send-email-albeu@free.fr
Signed-off-by: Jason Cooper

MIPS: ath79: Allow using ath79_ddr_wb_flush() from drivers

2016-01-04T08:42:25+00:00

Move the declaration of ath79_ddr_wb_flush() to asm/mach-ath79/ath79.h
to allow using it from drivers. This is needed to move the CPU IRQ
driver to drivers/irqchip.

Signed-off-by: Alban Bedel 
Cc: Thomas Gleixner 
Cc: Jason Cooper 
Cc: Marc Zyngier 
Cc: Alexander Couzens 
Cc: Joel Porquet 
Cc: Andrew Bresticker 
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11502/
Signed-off-by: Ralf Baechle

MIPS: Remove all the uses of custom gpio.h

2015-09-03T10:08:02+00:00

Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS
machines, and each machine type provides its own gpio.h. However
only a handful really implement the GPIO API, most just forward
everythings to gpiolib.

The Alchemy machine is notable as it provides a system to allow
implementing the GPIO API at the board level. But it is not used by
any board currently supported, so it can also be removed.

For most machine types we can just remove the custom gpio.h, as well
as the custom wrappers if some exists. Some of the code found in
the wrappers must be moved to the respective GPIO driver.

A few more fixes are need in some drivers as they rely on linux/gpio.h
to provides some machine specific definitions, or used asm/gpio.h
instead of linux/gpio.h for the gpio API.

Signed-off-by: Alban Bedel 
Reviewed-by: Linus Walleij 
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens 
Cc: Rafał Miłecki 
Cc: Bartlomiej Zolnierkiewicz 
Cc: Tejun Heo 
Cc: Alexandre Courbot 
Cc: Dmitry Torokhov 
Cc: Florian Fainelli 
Cc: Manuel Lauss 
Cc: Joe Perches 
Cc: Daniel Walter 
Cc: Sergey Ryazanov 
Cc: Huacai Chen 
Cc: James Hartley 
Cc: Andrew Bresticker 
Cc: Paul Burton 
Cc: Jiri Kosina 
Cc: Bjorn Helgaas 
Cc: Wolfram Sang 
Cc: Randy Dunlap 
Cc: Varka Bhadram 
Cc: Masanari Iida 
Cc: Tomi Valkeinen 
Cc: Michael Buesch 
Cc: abdoulaye berthe 
Cc: linux-kernel@vger.kernel.org
Cc: linux-ide@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-input@vger.kernel.org
Cc: netdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10828/
Signed-off-by: Ralf Baechle

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

2015-06-27T19:44:34+00:00

Pull MIPS updates from Ralf Baechle:

 - Improvements to the tlb_dump code
 - KVM fixes
 - Add support for appended DTB
 - Minor improvements to the R12000 support
 - Minor improvements to the R12000 support
 - Various platform improvments for BCM47xx
 - The usual pile of minor cleanups
 - A number of BPF fixes and improvments
 - Some improvments to the support for R3000 and DECstations
 - Some improvments to the ATH79 platform support
 - A major patchset for the JZ4740 SOC adding support for the CI20 platform
 - Add support for the Pistachio SOC
 - Minor BMIPS/BCM63xx platform support improvments.
 - Avoid "SYNC 0" as memory barrier when unlocking spinlocks
 - Add support for the XWR-1750 board.
 - Paul's __cpuinit/__cpuinitdata cleanups.
 - New Malta CPU board support large memory so enable ZONE_DMA32.

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (131 commits)
  MIPS: spinlock: Adjust arch_spin_lock back-off time
  MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA
  MIPS: BCM47xx: Simplify handling SPROM revisions
  MIPS: Cobalt Don't use module_init in non-modular MTD registration.
  MIPS: BCM47xx: Move NVRAM driver to the drivers/firmware/
  MIPS: use for_each_sg()
  MIPS: BCM47xx: Don't select BCMA_HOST_PCI
  MIPS: BCM47xx: Add helper variable for storing NVRAM length
  MIPS: IRQ/IP27: Move IRQ allocation API to platform code.
  MIPS: Replace smp_mb with release barrier function in unlocks.
  MIPS: i8259: DT support
  MIPS: Malta: Basic DT plumbing
  MIPS: include errno.h for ENODEV in mips-cm.h
  MIPS: Define GCR_GIC_STATUS register fields
  MIPS: BPF: Introduce BPF ASM helpers
  MIPS: BPF: Use BPF register names to describe the ABI
  MIPS: BPF: Move register definition to the BPF header
  MIPS: net: BPF: Replace RSIZE with SZREG
  MIPS: BPF: Free up some callee-saved registers
  MIPS: Xtalk: Update xwidget.h with known Xtalk device numbers
  ...

MIPS: ath79: Improve the DDR controller interface

2015-06-21T19:53:51+00:00

The DDR controller need to be used by the IRQ controller to flush
the write buffer of some devices before running the IRQ handler.
It is also used by the PCI controller to setup the PCI memory windows.

The current interface used to access the DDR controller doesn't
provides any useful abstraction and simply rely on a shared global
pointer.

Replace this by a simple API to setup the PCI memory windows and use
the write buffer flush independently of the SoC type. That remove the
need for the shared global pointer, simplify the IRQ handler code.

[ralf@linux-mips.org: Folded in Alban Bedel's follup fix.]

Signed-off-by: Alban Bedel 
Cc: linux-mips@linux-mips.org
Cc: Andrew Bresticker 
Cc: Qais Yousef 
Cc: Wolfram Sang 
Cc: Sergey Ryazanov 
Cc: Gabor Juhos 
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9773/
Patchwork: http://patchwork.linux-mips.org/patch/10543/
Signed-off-by: Ralf Baechle

MIPS: ath79: Correctly name the defines for the PLL_FB register

2015-06-21T19:53:49+00:00

This register is named PLL_FB and is not a divider but a multiplier.
To make things less confusing rename the ARxxxx_PLL_DIV_SHIFT and
ARxxxx_PLL_DIV_MASK macros to ARxxxx_PLL_FB_SHIFT and
ARxxxx_PLL_FB_MASK.

Signed-off-by: Alban Bedel 
Cc: linux-mips@linux-mips.org
Cc: Andrew Bresticker 
Cc: Qais Yousef 
Cc: Wolfram Sang 
Cc: Sergey Ryazanov 
Cc: Gabor Juhos 
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9772/
Signed-off-by: Ralf Baechle

spi: spi-ath79: Add device tree support

2015-04-27T14:44:56+00:00

Set the OF node of the spi controller and use the generic GPIO based
chip select instead of the custom controller data. As the controller
data isn't used by any board just drop it.

Signed-off-by: Alban Bedel 
Signed-off-by: Mark Brown

MIPS: Create a common

2015-03-31T09:59:40+00:00

11 platforms require at least one of these workarounds to be enabled; 22
platforms do not.  In the latter case we can fall back to a generic version.

Note that this also deletes an orphaned reference to RM9000_CDEX_SMP_WAR.

Suggested-by: Arnd Bergmann 
Signed-off-by: Kevin Cernekee 
Signed-off-by: Andrew Bresticker 
Reviewed-by: James Hogan 
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Ezequiel Garcia 
Cc: James Hartley 
Cc: James Hogan 
Patchwork: https://patchwork.linux-mips.org/patch/9567/
Signed-off-by: Ralf Baechle

mips: delete non-required instances of include

2014-01-24T21:39:56+00:00

None of these files are actually using any __init type directives
and hence don't need to include .  Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one driver to the next.

Signed-off-by: Paul Gortmaker 
Signed-off-by: John Crispin 
Patchwork: http://patchwork.linux-mips.org/patch/6320/