linux-toradex.git/arch/mips/include/asm/mach-bcm63xx, branch v4.2-rc8

Revert "MIPS: BCM63xx: Provide a plat_post_dma_flush hook"

2015-08-03T08:19:22+00:00

This reverts commit 3cf29543413207d3ab1c3f62a88c09bb46f2264e ("MIPS:
BCM63xx: Provide a plat_post_dma_flush hook") since this commit was
found to prevent BCM6358 (early BMIPS4350 cores) and some BCM6368
(BMIPS4380 cores) from booting reliably.

Alvaro was able to track this down to an issue specifically located to
devices that use the second thread (TP1) when booting. Since BCM63xx did
not have a need for plat_post_dma_flush() hook before, let's just keep
things the way they were.

Reported-by: Álvaro Fernández Rojas 
Reported-by: Jonas Gorski 
Signed-off-by: Florian Fainelli 
Cc: stable@vger.kernel.org
Cc: Kevin Cernekee 
Cc: Nicolas Schichan 
Cc: linux-mips@linux-mips.org
Cc: blogic@openwrt.org
Cc: noltari@gmail.com
Cc: jogo@openwrt.org
Cc: Florian Fainelli 
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10804/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Utilize asm/bmips-spaces.h

2015-06-21T19:53:32+00:00

Since BCM63xx runs on BMIPS3300 which requires the use of a FIXADDR_TOP
to avoid collisions with the SBR, utilize asm/bmips-spaces.h which
defines FIXADDR_TOP for us now.

Signed-off-by: Florian Fainelli 
Cc: linux-mips@linux-mips.org
Cc: blogic@openwrt.org
Cc: cernekee@chromium.org
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/9969/
Signed-off-by: Ralf Baechle

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

2015-04-17T19:50:54+00:00

Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for MIPS for Linux 4.1.  Most
  noteworthy:

   - Add more Octeon-optimized crypto functions
   - Octeon crypto preemption and locking fixes
   - Little endian support for Octeon
   - Use correct CSR to soft reset Octeons
   - Support LEDs on the Octeon-based DSR-1000N
   - Fix PCI interrupt mapping for the Octeon-based DSR-1000N
   - Mark prom_free_prom_memory() as __init for a number of systems
   - Support for Imagination's Pistachio SOC.  This includes arch and
     CLK bits.  I'd like to merge pinctrl bits later
   - Improve parallelism of csum_partial for certain pipelines
   - Organize DTB files in subdirs like other architectures
   - Implement read_sched_clock for all MIPS platforms other than
     Octeon
   - Massive series of 38 fixes and cleanups for the FPU emulator /
     kernel
   - Further FPU remulator work to support new features.  This sits on a
     separate branch which also has been pulled into the 4.1 KVM branch
   - Clean up and fixes for the SEAD3 eval board; remove unused file
   - Various updates for Netlogic platforms
   - A number of small updates for Loongson 3 platforms
   - Increase the memory limit for ATH79 platforms to 256MB
   - A fair number of fixes and updates for BCM47xx platforms
   - Finish the implementation of XPA support
   - MIPS FDC support.  No, not floppy controller but Fast Debug Channel :)
   - Detect the R16000 used in SGI legacy platforms
   - Fix Kconfig dependencies for the SSB bus support"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (265 commits)
  MIPS: Makefile: Fix MIPS ASE detection code
  MIPS: asm: elf: Set O32 default FPU flags
  MIPS: BCM47XX: Fix detecting Microsoft MN-700 & Asus WL500G
  MIPS: Kconfig: Disable SMP/CPS for 64-bit
  MIPS: Hibernate: flush TLB entries earlier
  MIPS: smp-cps: cpu_set FPU mask if FPU present
  MIPS: lose_fpu(): Disable FPU when MSA enabled
  MIPS: ralink: add missing symbol for RALINK_ILL_ACC
  MIPS: ralink: Fix bad config symbol in PCI makefile.
  SSB: fix Kconfig dependencies
  MIPS: Malta: Detect and fix bad memsize values
  Revert "MIPS: Avoid pipeline stalls on some MIPS32R2 cores."
  MIPS: Octeon: Delete override of cpu_has_mips_r2_exec_hazard.
  MIPS: Fix cpu_has_mips_r2_exec_hazard.
  MIPS: kernel: entry.S: Set correct ISA level for mips_ihb
  MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case
  MIPS: r4kcache: Use correct base register for MIPS R6 cache flushes
  MIPS: Kconfig: Fix typo for the r2-to-r6 emulator kernel parameter
  MIPS: unaligned: Fix regular load/store instruction emulation for EVA
  MIPS: unaligned: Surround load/store macros in do {} while statements
  ...

MIPS: BCM63xx: Provide a plat_post_dma_flush hook

2015-04-08T21:52:33+00:00

Broadcom BCM63xx DSL SoCs utilize BMIPS CPUs, and as such are required
to perform a read-ahead cache flush after a DMA transfer. Utilize
asm/bmips.h to provide a plat_post_dma_flush_hook, and
mach-generic/dma-coherence.h for everything else.

Signed-off-by: Florian Fainelli 
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/9726/
Signed-off-by: Ralf Baechle

MIPS: Create a common

2015-03-31T09:59:40+00:00

11 platforms require at least one of these workarounds to be enabled; 22
platforms do not.  In the latter case we can fall back to a generic version.

Note that this also deletes an orphaned reference to RM9000_CDEX_SMP_WAR.

Suggested-by: Arnd Bergmann 
Signed-off-by: Kevin Cernekee 
Signed-off-by: Andrew Bresticker 
Reviewed-by: James Hogan 
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Ezequiel Garcia 
Cc: James Hartley 
Cc: James Hogan 
Patchwork: https://patchwork.linux-mips.org/patch/9567/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: remove RSET_RNG register definitions

2015-03-01T10:02:26+00:00

Now that these definitions have been moved to
drivers/char/hw_random/bcm63xx-rng.c where they belong to make the
driver standalone, we can safely remove these definitions from
bcm63xx_regs.h.

Signed-off-by: Florian Fainelli 
Signed-off-by: Herbert Xu

MIPS: Replace use of phys_t with phys_addr_t.

2014-11-24T21:47:31+00:00

Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Append irq line to irq_{stat,mask}*

2014-07-30T13:28:11+00:00

The SMP capable irq controllers have two interrupt output pins which are
controlled through separate registers, so make the variables arrays.

Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Cc: Kevin Cernekee 
Cc: Gregory Fong 
Patchwork: https://patchwork.linux-mips.org/patch/7318/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Remove !RUNTIME_DETECT code for bcmcpu_get_id

2014-07-30T13:25:05+00:00

Use the same pattern as with get_*_cpu_type() to allow the compiler
to remove code for non enabled SoC types.

Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Cc: Kevin Cernekee 
Patchwork: https://patchwork.linux-mips.org/patch/7273/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Remove !RUNTIME_DETECT in cpu-feature-overrides

2014-07-30T13:24:35+00:00

All three SoCs have in common they have a BMIPS32/BMIPS3300 CPU, so
we can replace this as no SoC with BMIPS4350 support enabled.

Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Cc: Kevin Cernekee 
Patchwork: https://patchwork.linux-mips.org/patch/7272/
Signed-off-by: Ralf Baechle