<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/mips/include/asm/mach-malta, branch v3.2.48</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platforms</title>
<updated>2011-07-25T16:26:55+00:00</updated>
<author>
<name>Shinya Kuribayashi</name>
<email>skuribay@pobox.com</email>
</author>
<published>2010-07-12T15:41:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5fba0960809534f008260a621046f38a5f46f417'/>
<id>5fba0960809534f008260a621046f38a5f46f417</id>
<content type='text'>
Enable cpu_has_clo_clz only when CONFIG_CPU_MIPS32 or CONFIG_CPU_MIPS64
is selected.  This will optimize fls() and __fls() to use CLZ insn, and
eventually ffs() and __ffs() as well.

Malta and MIPSSim are development platforms, and need to take care of
various processor configurations, release rivisions and so on, even
across different MIPS ISAs.  For such platforms we have to be careful,
for instance, with turning on cpu_has_mips{32,64}r[12] features.

As for CLZ, all MIPS32/64 processors support it, regardless of release
revisions.

Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;
To: David VomLehn &lt;dvomlehn@cisco.com&gt;
To: macro@linux-mips.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1453/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable cpu_has_clo_clz only when CONFIG_CPU_MIPS32 or CONFIG_CPU_MIPS64
is selected.  This will optimize fls() and __fls() to use CLZ insn, and
eventually ffs() and __ffs() as well.

Malta and MIPSSim are development platforms, and need to take care of
various processor configurations, release rivisions and so on, even
across different MIPS ISAs.  For such platforms we have to be careful,
for instance, with turning on cpu_has_mips{32,64}r[12] features.

As for CLZ, all MIPS32/64 processors support it, regardless of release
revisions.

Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;
To: David VomLehn &lt;dvomlehn@cisco.com&gt;
To: macro@linux-mips.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1453/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Malta: Remove pointless use use of CONFIG_CPU_HAS_LLSC</title>
<updated>2009-09-17T18:07:49+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2009-09-17T00:25:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b8d6f78cd058e34ec706f7cb353fdb2eb743c050'/>
<id>b8d6f78cd058e34ec706f7cb353fdb2eb743c050</id>
<content type='text'>
All CPUs for Malta support LL/SC.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All CPUs for Malta support LL/SC.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Move headfiles to new location below arch/mips/include</title>
<updated>2008-10-11T15:18:52+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2008-09-16T17:48:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=384740dc49ea651ba350704d13ff6be9976e37fe'/>
<id>384740dc49ea651ba350704d13ff6be9976e37fe</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
