linux-toradex.git/arch/mips/include/asm/mach-sead3, branch v3.14.15 Linux kernel for Apalis and Colibri modules MIPS: microMIPS: Disable LL/SC and fix linker bug. 2013-05-09T15:55:19+00:00 Steven J. Hill Steven.Hill@imgtec.com 2013-03-25T18:22:59+00:00 1658f914ff91c3bf572d5ddae3773720f6803d20 Partially revert commit e0c14a260d66ba35935600d6435940a566fe806b and turn off LL/SC when building a pure microMIPS kernel. This is a temporary fix until the cmpxchg assembly macro functions are re-written to not use the HI/LO registers in address calculations. Also add .insn in selected user access functions which would otherwise produce ISA mode jump incompatibilities. This is also a temporary fix. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> 
Partially revert commit e0c14a260d66ba35935600d6435940a566fe806b
and turn off LL/SC when building a pure microMIPS kernel. This is
a temporary fix until the cmpxchg assembly macro functions are
re-written to not use the HI/LO registers in address calculations.

Also add .insn in selected user access functions which would
otherwise produce ISA mode jump incompatibilities. This is also a
temporary fix.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
MIPS: SEAD3: Enable LL/SC. 2013-03-12T17:58:09+00:00 Ralf Baechle ralf@linux-mips.org 2013-03-12T15:06:07+00:00 f4cdb6a00c148e7724ada0998643b293a52b5f62 All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are MIPS32 or MIPS64 CPUs that have ll/sc. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are
MIPS32 or MIPS64 CPUs that have ll/sc.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Get rid of CONFIG_CPU_HAS_LLSC again 2013-03-12T17:58:02+00:00 Paul Bolle pebolle@tiscali.nl 2013-03-05T12:20:20+00:00 631b0af98c1efb160f02154743ae9f13fe03e347 Commit f7ade3c168e4f437c11f57be012992bbb0e3075c ("MIPS: Get rid of CONFIG_CPU_HAS_LLSC") did what it promised to do. But since then that macro and its Kconfig symbol popped up again. Get rid of those again. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Cc: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4978/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Commit f7ade3c168e4f437c11f57be012992bbb0e3075c ("MIPS: Get rid of
CONFIG_CPU_HAS_LLSC") did what it promised to do. But since then that
macro and its Kconfig symbol popped up again. Get rid of those again.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/4978/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Whitespace cleanup. 2013-02-01T09:00:22+00:00 Ralf Baechle ralf@linux-mips.org 2013-01-22T11:59:30+00:00 7034228792cc561e79ff8600f02884bd4c80e287 Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: PMC-Sierra Yosemite: Remove support. 2012-12-13T17:15:30+00:00 Ralf Baechle ralf@linux-mips.org 2012-12-11T20:02:55+00:00 bdf20507da11a9a5b32ef04fa09f352828189aef Nobody seems to be interested anymore and upstream also never had an ethernet driver. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Nobody seems to be interested anymore and upstream also never had an
ethernet driver.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Add core files for MIPS SEAD-3 development platform. 2012-09-13T20:43:46+00:00 Steven J. Hill sjhill@mips.com 2012-05-30T21:02:49+00:00 3070033a16edcc21688d5ea8967c89522f833862 More information about the SEAD-3 platform can be found at <http://www.mips.com/products/development-kits/mips-sead-3/> on MTI's site. Currently, the M14K family of cores is what the SEAD-3 is utilised with. Signed-off-by: Douglas Leung <douglas@mips.com> Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Steven J. Hill <sjhill@mips.com> 
More information about the SEAD-3 platform can be found at
<http://www.mips.com/products/development-kits/mips-sead-3/>
on MTI's site. Currently, the M14K family of cores is what
the SEAD-3 is utilised with.

Signed-off-by: Douglas Leung <douglas@mips.com>
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Steven J. Hill <sjhill@mips.com>