linux-toradex.git/arch/mips/include/asm/module.h, branch v3.3.5 Linux kernel for Apalis and Colibri modules Merge branches 'next/ar7', 'next/ath79', 'next/bcm63xx', 'next/bmips', 'next/cavium', 'next/generic', 'next/kprobes', 'next/lantiq', 'next/perf' and 'next/raza' into mips-for-linux-next 2012-01-11T14:42:31+00:00 Ralf Baechle ralf@linux-mips.org 2012-01-11T14:42:31+00:00 7bf6612e8a9d6a0b3b82e8e2611942be1258b307 






MIPS: Netlogic: XLP CPU support.
2011-12-07T22:04:55+00:00

Jayachandran C
jayachandranc@netlogicmicro.com

2011-11-16T00:21:20+00:00

a3d4fb2d2a4c52b22cde90049a78e323cde187e5

Add support for Netlogic's XLP MIPS SoC. This patch adds:
* XLP processor ID in cpu_probe.c and asm/cpu.h
* XLP case to asm/module.h
* CPU_XLP case to mm/tlbex.c
* minor change to r4k cache handling to ignore XLP secondary cache
* XLP cpu overrides to mach-netlogic/cpu-feature-overrides.h

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2966/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>





Add support for Netlogic's XLP MIPS SoC. This patch adds:
* XLP processor ID in cpu_probe.c and asm/cpu.h
* XLP case to asm/module.h
* CPU_XLP case to mm/tlbex.c
* minor change to r4k cache handling to ignore XLP secondary cache
* XLP cpu overrides to mach-netlogic/cpu-feature-overrides.h

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2966/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>







MIPS: BMIPS: Add CFLAGS, Makefile entries for BMIPS
2011-12-07T22:03:17+00:00

Kevin Cernekee
cernekee@gmail.com

2011-11-16T01:25:40+00:00

1c7c44519a12d79af1f599a8cc4997e1230025ed

Add CONFIG_CPU_BMIPS* in all of the right places, so that BMIPS kernel
images will compile and run.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2955/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>





Add CONFIG_CPU_BMIPS* in all of the right places, so that BMIPS kernel
images will compile and run.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2955/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>







MIPS: Netlogic: Cache, TLB support and feature overrides for XLR
2011-05-19T08:55:40+00:00

Jayachandran C
jayachandranc@netlogicmicro.com

2011-05-06T20:06:21+00:00

efa0f81c11021c95b1e72c65868115b6fb4ecc6a

CPU_XLR case added to mm/tlbex.c
CPU_XLR case added to mm/c-r4k.c for PINDEX attribute
Feature overrides for XLR cpu.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2333/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>





CPU_XLR case added to mm/tlbex.c
CPU_XLR case added to mm/c-r4k.c for PINDEX attribute
Feature overrides for XLR cpu.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2333/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>







MIPS: Add Cavium OCTEON processor constants and CPU probe.
2009-01-11T09:57:22+00:00

David Daney
ddaney@caviumnetworks.com

2008-12-11T23:33:26+00:00

0dd4781bca56871434507ed35d5bb8ef92077907

Add OCTEON constants to asm/cpu.h and asm/module.h.

Add probe function for Cavium OCTEON CPUs and hook it up.

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>





Add OCTEON constants to asm/cpu.h and asm/module.h.

Add probe function for Cavium OCTEON CPUs and hook it up.

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>







MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors
2008-10-27T16:18:29+00:00

Shinya Kuribayashi
skuribay@ruby.dti.ne.jp

2008-10-23T16:27:57+00:00

542c1020ac1cbc2f50934086ad893384a2cbd233

We already have sufficient infrastructure to support VR5500 and VR5500A
series processors.  Here's a Makefile support to make it selectable by
ports, and enable it for NEC EMMA2RH Markeins board.

This patch also fixes a confused target help, and adds 1Gb PageMask bits
supported by VR5500 and its variants.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>





We already have sufficient infrastructure to support VR5500 and VR5500A
series processors.  Here's a Makefile support to make it selectable by
ports, and enable it for NEC EMMA2RH Markeins board.

This patch also fixes a confused target help, and adds 1Gb PageMask bits
supported by VR5500 and its variants.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>







MIPS: Move headfiles to new location below arch/mips/include
2008-10-11T15:18:52+00:00

Ralf Baechle
ralf@linux-mips.org

2008-09-16T17:48:51+00:00

384740dc49ea651ba350704d13ff6be9976e37fe

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>





Signed-off-by: Ralf Baechle <ralf@linux-mips.org>