linux-toradex.git/arch/mips/include/uapi, branch v4.3-rc2

Merge branch '4.2-fixes' into mips-for-linux-next

2015-09-03T12:06:33+00:00

MIPS: UAPI: Fix unrecognized opcode WSBH/DSBH/DSHD when using MIPS16.

2015-09-03T10:11:56+00:00

The nomips16 has to be added both as function attribute and assembler
directive.

When only function attribute is specified, the compiler will inline the
function with -Os optimization.  The generated assembly code cannot be
correctly assembled because ISA mode switch has to be done through jump
instruction.

When only ".set nomips16" directive is used, the generated assembly code
will use MIPS32 code for the inline assembly template and MIPS16 for the
function return.  The compiled binary is invalid:

    00403100 <__arch_swab16>:
      403100:   7c0410a0    wsbh    v0,a0
      403104:   e820ea31    swc2    $0,-5583(at)

while correct code should be:

    00402650 <__arch_swab16>:
      402650:   7c0410a0    wsbh    v0,a0
      402654:   03e00008    jr  ra
      402658:   3042ffff    andi    v0,v0,0xffff

Signed-off-by: Yousong Zhou 
Cc: Chen Jie 
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11087/
Signed-off-by: Ralf Baechle

MIPS: inst.h: Add new MIPS R6 FPU opcodes

2015-09-03T10:08:12+00:00

Add opcodes for the new MIPS R6 FPU instructions.

Signed-off-by: Markos Chandras 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10952/
Signed-off-by: Ralf Baechle

MIPS: Add uprobes support.

2015-09-03T10:08:05+00:00

Signed-off-by: Ralf Baechle

MIPS: AT_HWCAP aux vector infrastructure

2015-09-03T10:07:59+00:00

In order for userland to determine whether various features are safe to
use, it will need to know both that the hardware supports those features
and that the kernel is recent enough & configured appropriately to
support them. For example under the O32 modeless FP proposal the dynamic
linker & ifunc resolvers will need this information.  The kernel is the
only thing in a position to know availability accurately, so the kernel
needs to provide the information to userland. This patch introduces the
infrastructure to provide the AT_HWCAP aux vector to userland in order
to provide that information. It also defines the 2 currently specified
flags, which indicate MIPSr6 & MSA support.

Signed-off-by: Paul Burton 
Cc: linux-mips@linux-mips.org
Cc: Guenter Roeck 
Cc: Matthew Fortune 
Cc: Kees Cook 
Cc: Huacai Chen 
Cc: Maciej W. Rozycki 
Cc: Alex Smith 
Cc: linux-kernel@vger.kernel.org
Cc: Leonid Yegoshin 
Cc: Markos Chandras 
Cc: Ingo Molnar 
Patchwork: https://patchwork.linux-mips.org/patch/10797/
Signed-off-by: Ralf Baechle

MIPS: Add definitions for extended context

2015-09-03T10:07:58+00:00

The context introduced by MSA needs to be saved around signals. However,
we can't increase the size of struct sigcontext because that will change
the offset of the signal mask in struct sigframe or struct ucontext.
This patch instead places the new context immediately after the struct
sigframe for traditional signals, or similarly after struct ucontext for
RT signals. The layout of struct sigframe & struct ucontext is identical
from their sigcontext fields onwards, so the offset from the sigcontext
to the extended context will always be the same regardless of the type
of signal.

Userland will be able to search through the extended context by using
the magic values to detect which types of context are present. Any
unrecognised context can be skipped over using the size field of struct
extcontext. Once the magic value END_EXTCONTEXT_MAGIC is seen it is
known that there are no further extended context structures to examine.

This approach is somewhat similar to that taken by ARM to save VFP &
other context at the end of struct ucontext.

Userland can determine whether extended context is present by checking
for the USED_EXTCONTEXT bit in the sc_used_math field of struct
sigcontext. Whilst this could potentially change the historic semantics
of sc_used_math if further extended context which does not imply FP
context were to be introduced in the future, I have been unable to find
any userland code making use of sc_used_math at all. Using one of the
fields described as unused in struct sigcontext was considered, but the
kernel does not already write to those fields so there would be no
guarantee of the field being clear on older kernels. Other alternatives
would be to have userland check the kernel version, or to have a HWCAP
bit indicating presence of extended context. However there is a desire
to have the context & information required to decode it be self
contained such that, for example, debuggers could decode the saved
context easily.

[ralf@linux-mips.org: Fixed conflict.]

Signed-off-by: Paul Burton 
Cc: linux-mips@linux-mips.org
Cc: Guenter Roeck 
Cc: Matthew Fortune 
Cc: Peter Zijlstra 
Cc: Zubair Lutfullah Kakakhel 
Cc: Alex Smith 
Cc: linux-kernel@vger.kernel.org
Cc: Richard Weinberger 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: Michael Ellerman 
Cc: Markos Chandras 
Cc: Daniel Borkmann 
Cc: Maciej W. Rozycki 
Patchwork: https://patchwork.linux-mips.org/patch/10795/
Signed-off-by: Ralf Baechle

MIPS: Indicate FP mode in sigcontext sc_used_math

2015-09-03T10:07:56+00:00

The sc_used_math field of struct sigcontext & its variants has
traditionally been used as a boolean value indicating only whether or
not floating point context is saved within the sigcontext. With various
supported FP modes & the ability to switch between them this information
will no longer be enough to decode the meaning of the data stored in the
sc_fpregs fields of struct sigcontext.

To make that possible 3 bits are defined within sc_used_math:

  - Bit 0 (USED_FP) represents whether FP was used, essentially
    providing the boolean flag which sc_used_math as a whole provided
    previously.

  - Bit 1 (USED_FR1) provides the value of the Status.FR bit at the time
    the FP context was saved.

  - Bit 2 (USED_HYBRID_FPRS) indicates whether the FP context was saved
    under the hybrid FPR scheme. Essentially, when set the odd singles
    are located in bits 63:32 of the preceding even indexed sc_fpregs
    element.

Any userland that tests whether the sc_used_math field is zero or
non-zero will continue to function as expected. Having said that, I
could not find any userland which uses the sc_used_math field at all.

[ralf@linux-mips.org: Fixed rejects.]

Signed-off-by: Paul Burton 
Cc: linux-mips@linux-mips.org
Cc: Guenter Roeck 
Cc: Matthew Fortune 
Cc: Michael Ellerman 
Cc: linux-kernel@vger.kernel.org
Cc: Richard Weinberger 
Cc: Andy Lutomirski 
Cc: Maciej W. Rozycki 
Patchwork: https://patchwork.linux-mips.org/patch/10794/
Signed-off-by: Ralf Baechle

MIPS: Declare MSA MI10 instruction formats

2015-09-03T10:07:39+00:00

Declare a struct describing the MSA MI10 instruction format used for ld &
st instructions, for use by subsequent patches.

Signed-off-by: Paul Burton 
Cc: linux-mips@linux-mips.org
Cc: Leonid Yegoshin 
Cc: Steven J. Hill 
Cc: linux-kernel@vger.kernel.org
Cc: Markos Chandras 
Patchwork: https://patchwork.linux-mips.org/patch/10571/
Signed-off-by: Ralf Baechle

MIPS: asm-offset.c: Patch up various comments refering to the old filename.

2015-07-14T14:05:49+00:00

arch/mips/tools/offset.c was renamed to arch/mips/kernel/asm-offsets.c
for v2.6.14.

Signed-off-by: Ralf Baechle

MIPS: KVM: Expose MSA registers

2015-03-27T21:25:21+00:00

Add KVM register numbers for the MIPS SIMD Architecture (MSA) registers,
and implement access to them with the KVM_GET_ONE_REG / KVM_SET_ONE_REG
ioctls when the MSA capability is enabled (exposed in a later patch) and
present in the guest according to its Config3.MSAP bit.

The MSA vector registers use the same register numbers as the FPU
registers except with a different size (128bits). Since MSA depends on
Status.FR=1, these registers are inaccessible when Status.FR=0. These
registers are returned as a single native endian 128bit value, rather
than least significant half first with each 64-bit half native endian as
the kernel uses internally.

Signed-off-by: James Hogan 
Cc: Paolo Bonzini 
Cc: Paul Burton 
Cc: Ralf Baechle 
Cc: Gleb Natapov 
Cc: Jonathan Corbet 
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Cc: linux-api@vger.kernel.org
Cc: linux-doc@vger.kernel.org