linux-toradex.git/arch/mips/include, branch v2.6.38.2

MIPS, Perf-events: Work with irq_work

2011-03-14T20:07:26+00:00

This is the MIPS part of the following commit by Peter Zijlstra:

- e360adbe29241a0194e10e20595360dd7b98a2b3
    irq_work: Add generic hardirq context callbacks

    Provide a mechanism that allows running code in IRQ context. It is
    most useful for NMI code that needs to interact with the rest of the
    system -- like wakeup a task to drain buffers.

    Perf currently has such a mechanism, so extract that and provide it as
    a generic feature, independent of perf so that others may also
    benefit.

    The IRQ context callback is generated through self-IPIs where
    possible, or on architectures like powerpc the decrementer (the
    built-in timer facility) is set to generate an interrupt immediately.

    Architectures that don't have anything like this get to do with a
    callback from the timer tick. These architectures can call
    irq_work_run() at the tail of any IRQ handlers that might enqueue such
    work (like the perf IRQ handler) to avoid undue latencies in
    processing the work.

For MIPSXX, we need to call irq_work_run() at the tail of the perf IRQ
handler as described above.

Reported-by: Wu Zhangjin 
Acked-by: Peter Zijlstra 
Acked-by: David Daney 
Signed-off-by: Deng-Cheng Zhu 
To: fweisbec@gmail.com
To: will.deacon@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: matt@console-pimps.org
Cc: sshtylyov@mvista.com,
Patchwork: http://patchwork.linux-mips.org/patch/2011/
Signed-off-by: Ralf Baechle

MIPS: Implement __read_mostly

2011-01-18T18:30:28+00:00

Just do what everyone else is doing by placing __read_mostly things in
the .data.read_mostly section.

mips_io_port_base can not be read-only (const) and writable
(__read_mostly) at the same time.  One of them has to go, so I chose
to eliminate the __read_mostly.  It will still get stuck in a portion
of memory that is not adjacent to things that are written, and thus
not be on a dirty cache line, for whatever that is worth.

Signed-off-by: David Daney 
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1702/
Signed-off-by: Ralf Baechle

MIPS: ath79: add common WMAC device for AR913X based boards

2011-01-18T18:30:28+00:00

Add common platform_device and helper code to make the registration
of the built-in wireless MAC easier on the Atheros AR9130/AR9132
based boards. Also register the WMAC device on the AR81 board.

Signed-off-by: Gabor Juhos 
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz ,
Cc: Luis R. Rodriguez 
Cc: Cliff Holden 
Cc: Kathy Giori 
Patchwork: https://patchwork.linux-mips.org/patch/1962/
Signed-off-by: Ralf Baechle

MIPS: ath79: add common SPI controller device

2011-01-18T18:30:27+00:00

Several boards are using the built-in SPI controller of the
AR71XX/AR724X/AR913X SoCs. This patch adds common platform_device
and helper code to register it. Additionally, the patch registers
the SPI bus on the PB44 board.

Signed-off-by: Gabor Juhos 
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz 
Cc: Luis R. Rodriguez 
Cc: Cliff Holden 
Cc: Kathy Giori 
Patchwork: https://patchwork.linux-mips.org/patch/1956/
Signed-off-by: Ralf Baechle

SPI: Add SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs

2011-01-18T18:30:27+00:00

The Atheros AR71XX/AR724X/AR913X SoCs have a built-in SPI controller. This
patch implements a driver for that.

Signed-off-by: Gabor Juhos 
Cc: David Brownell 
Cc: spi-devel-general@lists.sourceforge.net
Acked-by: Grant Likely 
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz 
Cc: Luis R. Rodriguez 
Cc: Cliff Holden 
Cc: Kathy Giori 
Patchwork: https://patchwork.linux-mips.org/patch/1960/
Signed-off-by: Ralf Baechle

MIPS: ath79: add GPIOLIB support

2011-01-18T18:30:25+00:00

This patch implements generic GPIO routines for the built-in
GPIO controllers of the Atheros AR71XX/AR724X/AR913X SoCs.

Signed-off-by: Gabor Juhos 
Signed-off-by: Imre Kaloz 
Cc: David Brownell 
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez 
Cc: Cliff Holden 
Cc: Kathy Giori 
Patchwork: https://patchwork.linux-mips.org/patch/1948/
Signed-off-by: Ralf Baechle

MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs

2011-01-18T18:30:24+00:00

This patch adds initial support for various Atheros SoCs based on the
MIPS 24Kc core. The following models are supported at the moment:

  - AR7130
  - AR7141
  - AR7161
  - AR9130
  - AR9132
  - AR7240
  - AR7241
  - AR7242

The current patch contains minimal support only, but the resulting
kernel can boot into user-space with using of an initramfs image on
various boards which are using these SoCs. Support for more built-in
devices and individual boards will be implemented in further patches.

Signed-off-by: Gabor Juhos 
Signed-off-by: Imre Kaloz 
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez 
Cc: Cliff Holden 
Cc: Kathy Giori 
Patchwork: https://patchwork.linux-mips.org/patch/1947/
Signed-off-by: Ralf Baechle

MIPS: jump label: Add MIPS support.

2011-01-18T18:30:24+00:00

In order not to be left behind, we add jump label support for MIPS.

Tested on 64-bit big endian (Octeon), and 32-bit little endian
(malta/qemu).

Signed-off-by: David Daney 
To: linux-mips@linux-mips.org
Cc: Steven Rostedt 
Cc: Jason Baron 
Patchwork: https://patchwork.linux-mips.org/patch/1923/
Signed-off-by: Ralf Baechle

MIPS: Add LDX and LWX instructions to uasm.

2011-01-18T18:30:23+00:00

Needed by Octeon II optimized TLB handlers.

Signed-off-by: David Daney 
To: linux-mips@linux-mips.org
Pachwork: https://patchwork.linux-mips.org/patch/1903/
Signed-off-by: Ralf Baechle

MIPS: Declare uasm bbit0 and bbit1 functions.

2011-01-18T18:30:22+00:00

these are already defined, but declaring them allow them to be used
outside of uasm.c.

Signed-off-by: David Daney 
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1872/
Signed-off-by: Ralf Baechle