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<title>linux-toradex.git/arch/mips/jz4740, branch v3.6</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>MIPS: JZ4740: reset: Initialize hibernate wakeup counters.</title>
<updated>2012-07-23T12:56:20+00:00</updated>
<author>
<name>Maarten ter Huurne</name>
<email>maarten@treewalker.org</email>
</author>
<published>2012-03-30T14:18:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ea3952e01c47ac76d71857099cbfc2f487f507d2'/>
<id>ea3952e01c47ac76d71857099cbfc2f487f507d2</id>
<content type='text'>
In hibernation mode only the wakeup logic and the RTC are left running,
so this is what users perceive as power down.

If the counters are not initialized, the corresponding pin (typically
connected to the power button) has to be asserted for two seconds
before the device wakes up. Most users expect a shorter wakeup time.

I took the timing values of 100 ms and 60 ms from BouKiCHi's patch for
the Dingoo A320 kernel.

Signed-off-by: Maarten ter Huurne &lt;maarten@treewalker.org&gt;
Cc: Sergei Shtylyov &lt;sshtylyov@mvista.com&gt;
Cc: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3563/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
In hibernation mode only the wakeup logic and the RTC are left running,
so this is what users perceive as power down.

If the counters are not initialized, the corresponding pin (typically
connected to the power button) has to be asserted for two seconds
before the device wakes up. Most users expect a shorter wakeup time.

I took the timing values of 100 ms and 60 ms from BouKiCHi's patch for
the Dingoo A320 kernel.

Signed-off-by: Maarten ter Huurne &lt;maarten@treewalker.org&gt;
Cc: Sergei Shtylyov &lt;sshtylyov@mvista.com&gt;
Cc: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3563/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: JZ4740: qi_lb60: Look for NAND chip in bank 1.</title>
<updated>2012-07-23T12:56:20+00:00</updated>
<author>
<name>Maarten ter Huurne</name>
<email>maarten@treewalker.org</email>
</author>
<published>2012-03-29T17:17:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=56635d79932c805f6eb2a775ad1cdf9ace12c2b5'/>
<id>56635d79932c805f6eb2a775ad1cdf9ace12c2b5</id>
<content type='text'>
All NanoNotes have their NAND in bank 1.
Specifying the bank is required since multi-bank support was introduced.

Signed-off-by: Maarten ter Huurne &lt;maarten@treewalker.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3561/
Acked-By: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
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<pre>
All NanoNotes have their NAND in bank 1.
Specifying the bank is required since multi-bank support was introduced.

Signed-off-by: Maarten ter Huurne &lt;maarten@treewalker.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3561/
Acked-By: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MTD: NAND: JZ4740: Multi-bank support with autodetection</title>
<updated>2012-07-23T12:56:20+00:00</updated>
<author>
<name>Maarten ter Huurne</name>
<email>maarten@treewalker.org</email>
</author>
<published>2012-03-29T17:17:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1471d41a5bdfdf83ed1e5c2148a9763e64b1f53b'/>
<id>1471d41a5bdfdf83ed1e5c2148a9763e64b1f53b</id>
<content type='text'>
The platform data can now specify which external memory banks to probe
for NAND chips, and in which order. Banks that contain a NAND are used
and the other banks are freed.

Squashed version of development done in jz-2.6.38 branch.
Original patch by Lars-Peter Clausen with some bug fixes from me.
Thanks to Paul Cercueil for the initial autodetection patch.

Signed-off-by: Maarten ter Huurne &lt;maarten@treewalker.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3560/
Acked-By: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The platform data can now specify which external memory banks to probe
for NAND chips, and in which order. Banks that contain a NAND are used
and the other banks are freed.

Squashed version of development done in jz-2.6.38 branch.
Original patch by Lars-Peter Clausen with some bug fixes from me.
Thanks to Paul Cercueil for the initial autodetection patch.

Signed-off-by: Maarten ter Huurne &lt;maarten@treewalker.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3560/
Acked-By: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Remove all -Wall and almost all -Werror usage from arch/mips.</title>
<updated>2012-05-21T14:09:36+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2012-05-21T14:09:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=39faa24688a0574bf2f89e1a0702c176f99bad1f'/>
<id>39faa24688a0574bf2f89e1a0702c176f99bad1f</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: jz4740: Convert qi_lb60 to use snd_soc_register_card()</title>
<updated>2012-01-20T13:58:29+00:00</updated>
<author>
<name>Axel Lin</name>
<email>axel.lin@gmail.com</email>
</author>
<published>2012-01-06T03:30:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b33005f3ef6a85be3202ee1b8a2513ed1ef4019d'/>
<id>b33005f3ef6a85be3202ee1b8a2513ed1ef4019d</id>
<content type='text'>
Use snd_soc_register_card() instead of creating a "soc-audio" platform device.

Signed-off-by: Axel Lin &lt;axel.lin@gmail.com&gt;
Acked-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use snd_soc_register_card() instead of creating a "soc-audio" platform device.

Signed-off-by: Axel Lin &lt;axel.lin@gmail.com&gt;
Acked-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Fix up inconsistency in panic() string argument.</title>
<updated>2011-12-07T22:01:45+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2011-11-17T15:07:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ab75dc02c151c9d2a2fd446334d740b097a3b9db'/>
<id>ab75dc02c151c9d2a2fd446334d740b097a3b9db</id>
<content type='text'>
Panic() invokes printk() to add a \n internally, so panic arguments should
not themselves end in \n.  Panic invocations in arch/mips and elsewhere
are inconsistently sometimes terminating in \n, sometimes not.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Panic() invokes printk() to add a \n internally, so panic arguments should
not themselves end in \n.  Panic invocations in arch/mips and elsewhere
are inconsistently sometimes terminating in \n, sometimes not.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: JZ4740: GPIO: Check correct IRQ in demux handler</title>
<updated>2011-10-24T22:34:25+00:00</updated>
<author>
<name>Lars-Peter Clausen</name>
<email>lars@metafoo.de</email>
</author>
<published>2011-09-24T00:29:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=933036386b36d8a9047798f31ab40f9e869bdd7d'/>
<id>933036386b36d8a9047798f31ab40f9e869bdd7d</id>
<content type='text'>
Check the trigger direction for the triggered IRQ instead of the parent IRQ.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/2433/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Check the trigger direction for the triggered IRQ instead of the parent IRQ.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/2433/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: JZ4740: GPIO: Simplify IRQ demuxer</title>
<updated>2011-10-24T22:34:25+00:00</updated>
<author>
<name>Lars-Peter Clausen</name>
<email>lars@metafoo.de</email>
</author>
<published>2011-09-24T00:29:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fe5a8b7f0602b5a536d23cd3468461e9de76256b'/>
<id>fe5a8b7f0602b5a536d23cd3468461e9de76256b</id>
<content type='text'>
We already know the base IRQ for a GPIO chip, so there is no need to
recalculate it in the demux handler.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Patchwork: http://patchwork.linux-mips.org/patch/2432/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We already know the base IRQ for a GPIO chip, so there is no need to
recalculate it in the demux handler.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Patchwork: http://patchwork.linux-mips.org/patch/2432/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: JZ4740: Use generic irq chip</title>
<updated>2011-10-24T22:34:25+00:00</updated>
<author>
<name>Lars-Peter Clausen</name>
<email>lars@metafoo.de</email>
</author>
<published>2011-09-24T00:29:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=83bc769200802c9ce8fd1c7315fd14198d385b12'/>
<id>83bc769200802c9ce8fd1c7315fd14198d385b12</id>
<content type='text'>
Use the generic irq chip framework to implement the jz4740 INTC and GPIO irq
chips.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2434/
Patchwork: https://patchwork.linux-mips.org/patch/2771/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use the generic irq chip framework to implement the jz4740 INTC and GPIO irq
chips.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2434/
Patchwork: https://patchwork.linux-mips.org/patch/2771/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: PM: Use struct syscore_ops instead of sysdevs for PM (v2)</title>
<updated>2011-09-21T15:53:51+00:00</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rjw@sisk.pl</email>
</author>
<published>2011-06-02T19:06:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bd7100099a46b59f433dd15ad60adbb4d4f3d625'/>
<id>bd7100099a46b59f433dd15ad60adbb4d4f3d625</id>
<content type='text'>
Convert some MIPS architecture's code to using struct syscore_ops
objects for power management instead of sysdev classes and sysdevs.

This simplifies the code and reduces the kernel's memory footprint.
It also is necessary for removing sysdevs from the kernel entirely in
the future.

Signed-off-by: Rafael J. Wysocki &lt;rjw@sisk.pl&gt;
Acked-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
Acked-and-tested-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: linux-kernel@vger.kernel.org
Cc: "Rafael J.  Wysocki" &lt;rjw@sisk.pl&gt;
Patchwork: http://patchwork.linux-mips.org/patch/2431/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert some MIPS architecture's code to using struct syscore_ops
objects for power management instead of sysdev classes and sysdevs.

This simplifies the code and reduces the kernel's memory footprint.
It also is necessary for removing sysdevs from the kernel entirely in
the future.

Signed-off-by: Rafael J. Wysocki &lt;rjw@sisk.pl&gt;
Acked-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
Acked-and-tested-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: linux-kernel@vger.kernel.org
Cc: "Rafael J.  Wysocki" &lt;rjw@sisk.pl&gt;
Patchwork: http://patchwork.linux-mips.org/patch/2431/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
