<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/mips/kernel/cpu-probe.c, branch v2.6.19.2</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>[MIPS] Fix RM9000 wait instruction detection.</title>
<updated>2006-10-09T22:20:45+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2006-06-02T10:48:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=441ee341ad63572f39cb8074e31806b5b1471d0b'/>
<id>441ee341ad63572f39cb8074e31806b5b1471d0b</id>
<content type='text'>
Only revisions &lt; 4.0 don't have a functional wait instruction.

From Thomas Koeller (Thomas.Koeller@baslerweb.com).

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
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<pre>
Only revisions &lt; 4.0 don't have a functional wait instruction.

From Thomas Koeller (Thomas.Koeller@baslerweb.com).

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Reduce race between cpu_wait() and need_resched() checking</title>
<updated>2006-09-27T12:37:40+00:00</updated>
<author>
<name>Atsushi Nemoto</name>
<email>anemo@mba.ocn.ne.jp</email>
</author>
<published>2006-06-07T16:09:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=60a6c3777ec607c5b19df9eac35088db4e142a6b'/>
<id>60a6c3777ec607c5b19df9eac35088db4e142a6b</id>
<content type='text'>
If a thread became runnable between need_resched() and the WAIT
instruction, switching to the thread will delay until a next interrupt.
Some CPUs can execute the WAIT instruction with interrupt disabled, so
we can get rid of this race on them (at least UP case).

Original Patch by Atsushi with fixing up for MIPS Technology's cores by
Ralf based on feedback from the RTL designers.

Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
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<pre>
If a thread became runnable between need_resched() and the WAIT
instruction, switching to the thread will delay until a next interrupt.
Some CPUs can execute the WAIT instruction with interrupt disabled, so
we can get rid of this race on them (at least UP case).

Original Patch by Atsushi with fixing up for MIPS Technology's cores by
Ralf based on feedback from the RTL designers.

Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Save 2k text size in cpu-probe</title>
<updated>2006-07-13T20:26:01+00:00</updated>
<author>
<name>Thiemo Seufer</name>
<email>ths@networkno.de</email>
</author>
<published>2006-07-03T12:30:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c36cd4bab5084798b401d529129a950f4a48662d'/>
<id>c36cd4bab5084798b401d529129a950f4a48662d</id>
<content type='text'>
The appended patch drops the inline for decode_configs, this saves about
2k of text size.

Signed-off-by: Thiemo Seufer &lt;ths@networkno.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
The appended patch drops the inline for decode_configs, this saves about
2k of text size.

Signed-off-by: Thiemo Seufer &lt;ths@networkno.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Uses MIPS_CONF_AR instead of magic constants.</title>
<updated>2006-07-13T20:26:01+00:00</updated>
<author>
<name>Thiemo Seufer</name>
<email>ths@networkno.de</email>
</author>
<published>2006-07-03T12:30:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3a01c49ad81d301fe7265dd63bfb15ee3c3754ef'/>
<id>3a01c49ad81d301fe7265dd63bfb15ee3c3754ef</id>
<content type='text'>
Signed-off-by: Thiemo Seufer &lt;ths@networkno.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
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<pre>
Signed-off-by: Thiemo Seufer &lt;ths@networkno.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Remove obsolete #include &lt;linux/config.h&gt;</title>
<updated>2006-06-30T17:25:36+00:00</updated>
<author>
<name>Jörn Engel</name>
<email>joern@wohnheim.fh-wedel.de</email>
</author>
<published>2006-06-30T17:25:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6ab3d5624e172c553004ecc862bfeac16d9d68b7'/>
<id>6ab3d5624e172c553004ecc862bfeac16d9d68b7</id>
<content type='text'>
Signed-off-by: Jörn Engel &lt;joern@wohnheim.fh-wedel.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</content>
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<pre>
Signed-off-by: Jörn Engel &lt;joern@wohnheim.fh-wedel.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] MIPS32/MIPS64 secondary cache management</title>
<updated>2006-06-29T20:10:52+00:00</updated>
<author>
<name>Chris Dearman</name>
<email>chris@mips.com</email>
</author>
<published>2006-06-20T16:15:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9318c51acd9689505850152cc98277a6d6f2d752'/>
<id>9318c51acd9689505850152cc98277a6d6f2d752</id>
<content type='text'>
    
Signed-off-by: Chris Dearman &lt;chris@mips.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
    
Signed-off-by: Chris Dearman &lt;chris@mips.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] SB1: Only pass1 FPUs are broken beyond recovery.</title>
<updated>2006-06-05T23:15:18+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2006-05-28T23:02:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=aa32374aaa2e516a9b0719477efae0782a62a79e'/>
<id>aa32374aaa2e516a9b0719477efae0782a62a79e</id>
<content type='text'>
    
The wrong revision number in the check was forcing a fallback to FPU
emulation for all SB1 cores in 2.6.
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
    
The wrong revision number in the check was forcing a fallback to FPU
emulation for all SB1 cores in 2.6.
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Treat R14000 like R10000.</title>
<updated>2006-05-31T23:28:35+00:00</updated>
<author>
<name>Kumba</name>
<email>kumba@gentoo.org</email>
</author>
<published>2006-05-17T02:23:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=44d921b246923380f26b8010e47ac5dfe48fcec5'/>
<id>44d921b246923380f26b8010e47ac5dfe48fcec5</id>
<content type='text'>
Signed-off-by: Joshua Kinard &lt;kumba@gentoo.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Joshua Kinard &lt;kumba@gentoo.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Fix detection and handling of the 74K processor.</title>
<updated>2006-05-31T23:28:30+00:00</updated>
<author>
<name>Chris Dearman</name>
<email>chris@mips.com</email>
</author>
<published>2006-05-02T13:08:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c620953c32d301c2a7bc73f9f780301e110b7d7c'/>
<id>c620953c32d301c2a7bc73f9f780301e110b7d7c</id>
<content type='text'>
    
Nothing exciting; Linux just didn't know it yet so this is most adding
a value to a case statement.
    
Signed-off-by: Chris Dearman &lt;chris@mips.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
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<pre>
    
Nothing exciting; Linux just didn't know it yet so this is most adding
a value to a case statement.
    
Signed-off-by: Chris Dearman &lt;chris@mips.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] War on whitespace: cleanup initial spaces followed by tabs.</title>
<updated>2006-03-21T13:27:47+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2006-03-11T08:18:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a3dddd560ee936495466d85ecc97490d171e8d31'/>
<id>a3dddd560ee936495466d85ecc97490d171e8d31</id>
<content type='text'>
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
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<pre>
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
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