linux-toradex.git/arch/mips/kernel/cpu-probe.c, branch v2.6.28.8

MIPS: Sort out CPU type to name translation.

2008-10-30T14:44:34+00:00

As noticed by David Daney , the old long switch
statement did not comply with the Linux C coding style.  It was also yet
another place of code to be changed when adding a new processor type
leading to annoying bugs for example in /proc/cpuinfo.

Fixed by moving the setting of the CPU type string into the core of the
probing code and a few BUG_ON() test to ensure the CPU probing code indeed
did its job and removing multiple now redundant tests.

Signed-off-by: Ralf Baechle

MIPS: Probe for watch registers on cores of all vendors, not just MTI.

2008-10-30T14:44:34+00:00

Signed-off-by: Ralf Baechle 
Acked-by: David Daney

MIPS: Probe watch registers and report configuration.

2008-10-11T15:18:56+00:00

Probe for watch register characteristics, and report them in /proc/cpuinfo.

Signed-off-by: David Daney 
Signed-off-by: Ralf Baechle

[MIPS] SMTC: Fix SMTC dyntick support.

2008-10-03T16:58:58+00:00

Rework of SMTC support to make it work with the new clock event system,
allowing "tickless" operation, and to make it compatible with the use of
the "wait_irqoff" idle loop.  The new clocking scheme means that the
previously optional IPI instant replay mechanism is now required, and has
been made more robust.

Signed-off-by: Kevin D. Kissell 
Signed-off-by: Ralf Baechle

[MIPS] Fix potential latency problem due to non-atomic cpu_wait.

2008-09-21T12:52:57+00:00

If an interrupt happened between checking of NEED_RESCHED and WAIT
instruction, adjust EPC to restart from checking of NEED_RESCHED.

Signed-off-by: Atsushi Nemoto 
Signed-off-by: Ralf Baechle

[MIPS] Move arch/mips/philips to arch/mips/nxp

2008-04-28T16:14:26+00:00

Signed-off-by: daniel.j.laird 
Signed-off-by: Ralf Baechle

[MIPS] Add support for MIPS CMP platform.

2008-04-28T16:14:26+00:00

Signed-off-by: Chris Dearman 
Signed-off-by: Atsushi Nemoto 
Signed-off-by: Ralf Baechle

[MIPS] Basic SPRAM support

2008-04-28T16:14:23+00:00

Signed-off-by: Chris Dearman 
Signed-off-by: Atsushi Nemoto 
Signed-off-by: Ralf Baechle

[MIPS] Fix loads of section missmatches

2008-03-12T14:14:41+00:00

Signed-off-by: Ralf Baechle

[MIPS] Alchemy: Au1210/Au1250 CPU support

2008-01-29T10:14:59+00:00

This patch adds IDs for new Au1200 variants: Au1210 and Au1250.
They are essentially identical to the Au1200 except for the Au1210
which has a different SoC-ID in the PRId register [bits 31:24].
The Au1250 is a "Au1200 V0.2".

Signed-off-by: Manuel Lauss 
Signed-off-by: Ralf Baechle