linux-toradex.git/arch/mips/kernel/cpu-probe.c, branch v3.6.4

MIPS: Add CPU support for Loongson1B

2012-07-23T12:57:04+00:00

Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology
(ICT) and the Chinese Academy of Sciences (CAS), which implements the
MIPS32 release 2 instruction set.

[ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device
which also is why it identifies itself with the Legacy Vendor ID in the
PrID register.  When applying the patch I shoveled some code around to
keep things in alphabetical order and avoid forward declarations.]

Signed-off-by: Kelvin Cheung 
Cc: To: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: wuzhangjin@gmail.com
Cc: zhzhl555@gmail.com
Cc: Kelvin Cheung 
Patchwork: https://patchwork.linux-mips.org/patch/3976/
Signed-off-by: Ralf Baechle

MIPS: Don't panic on 5KEc.

2012-07-19T09:22:48+00:00

It's a bloody bog standard MIPS64R2 core with just a new PrId ID.  Iow
that essentially means Linux just panics because it doesn't know how to
name the core.

[ralf@linux-mips.org: Split original patch into several smaller patches.]

Signed-off-by: Leonid Yegoshin 
Signed-off-by: Steven J. Hill 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3792/
Signed-off-by: Ralf Baechle

MIPS: Add support for the M14Kc core.

2012-07-06T21:56:00+00:00

[ralf@linux-mips.org: Fixed whitespace damage.]

Signed-off-by: Steven J. Hill 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3773/
Signed-off-by: Ralf Baechle

MIPS: Code formatting fixes.

2012-05-15T15:48:39+00:00

Signed-off-by: Steven J. Hill 
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle

Disintegrate asm/system.h for MIPS

2012-03-28T17:30:02+00:00

Disintegrate asm/system.h for MIPS.

Signed-off-by: David Howells 
Acked-by: Ralf Baechle 
cc: linux-mips@linux-mips.org

Merge branches 'next/ar7', 'next/ath79', 'next/bcm63xx', 'next/bmips', 'next/cavium', 'next/generic', 'next/kprobes', 'next/lantiq', 'next/perf' and 'next/raza' into mips-for-linux-next

2012-01-11T14:42:31+00:00

MIPS: Netlogic: Add support for XLP 3XX cores

2011-12-07T22:04:56+00:00

Add new processor ID to asm/cpu.h and kernel/cpu-probe.c.
Update to new CPU frequency detection code which works on XLP 3XX
and 8XX.

Signed-off-by: Jayachandran C 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2971/
Signed-off-by: Ralf Baechle

MIPS: Netlogic: XLP CPU support.

2011-12-07T22:04:55+00:00

Add support for Netlogic's XLP MIPS SoC. This patch adds:
* XLP processor ID in cpu_probe.c and asm/cpu.h
* XLP case to asm/module.h
* CPU_XLP case to mm/tlbex.c
* minor change to r4k cache handling to ignore XLP secondary cache
* XLP cpu overrides to mach-netlogic/cpu-feature-overrides.h

Signed-off-by: Jayachandran C 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2966/
Signed-off-by: Ralf Baechle

MIPS: Netlogic: add r4k_wait as the cpu_wait

2011-12-07T22:04:54+00:00

Use r4k_wait as the CPU wait function for XLR/XLS processors.

Signed-off-by: Jayachandran C 
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2728/
Signed-off-by: Ralf Baechle

MIPS: Alchemy: Au1300 SoC support

2011-12-07T22:02:05+00:00

Add basic support for the Au1300 variant(s):
- New GPIO/Interrupt controller
- DBDMA ids
- USB setup
- MMC support
- enable various PSC drivers
- detection code.

Signed-off-by: Manuel Lauss 
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2866/
Signed-off-by: Ralf Baechle