<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/mips/kernel/proc.c, branch v2.6.32.31</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>MIPS: Eleminate filenames from comments</title>
<updated>2009-08-03T16:52:40+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2009-07-06T08:13:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=49316cbf0a9875f102f98dc8b7c80cfa142e33cf'/>
<id>49316cbf0a9875f102f98dc8b7c80cfa142e33cf</id>
<content type='text'>
They tend to get not updated when files are moved around or copied and
lack any obvious use.  While at it zap some only too obvious comments and
as per Shinya's suggestion, add a copyright header to extable.c.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Acked-by: Shinya Kuribayashi &lt;shinya.kuribayashi@necel.com&gt;
Acked-by: Thadeu Lima de Souza Cascardo &lt;cascardo@holoscopio.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
They tend to get not updated when files are moved around or copied and
lack any obvious use.  While at it zap some only too obvious comments and
as per Shinya's suggestion, add a copyright header to extable.c.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Acked-by: Shinya Kuribayashi &lt;shinya.kuribayashi@necel.com&gt;
Acked-by: Thadeu Lima de Souza Cascardo &lt;cascardo@holoscopio.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Outline udelay and fix a few issues.</title>
<updated>2009-06-08T15:57:51+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2009-02-28T09:44:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5636919b5c909fee54a6ef5226475ecae012ad02'/>
<id>5636919b5c909fee54a6ef5226475ecae012ad02</id>
<content type='text'>
Outlining fixes the issue were on certain CPUs such as the R10000 family
the delay loop would need an extra cycle if it overlaps a cacheline
boundary.

The rewrite also fixes build errors with GCC 4.4 which was changed in
way incompatible with the kernel's inline assembly.

Relying on pure C for computation of the delay value removes the need for
explicit.  The price we pay is a slight slowdown of the computation - to
be fixed on another day.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Outlining fixes the issue were on certain CPUs such as the R10000 family
the delay loop would need an extra cycle if it overlaps a cacheline
boundary.

The rewrite also fixes build errors with GCC 4.4 which was changed in
way incompatible with the kernel's inline assembly.

Relying on pure C for computation of the delay value removes the need for
explicit.  The price we pay is a slight slowdown of the computation - to
be fixed on another day.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: show_cpuinfo prints the type of the calling CPU</title>
<updated>2008-10-15T11:46:50+00:00</updated>
<author>
<name>Johannes Dickgreber</name>
<email>tanzy@gmx.de</email>
</author>
<published>2008-10-13T17:36:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e47c659b55aff703a2a28e8bd01ee64948eeb417'/>
<id>e47c659b55aff703a2a28e8bd01ee64948eeb417</id>
<content type='text'>
It should print the type of the Nth processor.

Signed-off-by: Johannes Dickgreber &lt;tanzy@gmx.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It should print the type of the Nth processor.

Signed-off-by: Johannes Dickgreber &lt;tanzy@gmx.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Probe watch registers and report configuration.</title>
<updated>2008-10-11T15:18:56+00:00</updated>
<author>
<name>David Daney</name>
<email>ddaney@avtrex.com</email>
</author>
<published>2008-09-23T07:07:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=654f57bfb467996fb730eae96dc30ea4de989fdc'/>
<id>654f57bfb467996fb730eae96dc30ea4de989fdc</id>
<content type='text'>
Probe for watch register characteristics, and report them in /proc/cpuinfo.

Signed-off-by: David Daney &lt;ddaney@avtrex.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Probe for watch register characteristics, and report them in /proc/cpuinfo.

Signed-off-by: David Daney &lt;ddaney@avtrex.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS]: constify function pointer tables</title>
<updated>2008-01-29T10:15:03+00:00</updated>
<author>
<name>Jan Engelhardt</name>
<email>jengelh@computergmbh.de</email>
</author>
<published>2008-01-22T19:42:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=12323cacca2014dcf517d1988fcdb8e44a1f497b'/>
<id>12323cacca2014dcf517d1988fcdb8e44a1f497b</id>
<content type='text'>
Signed-off-by: Jan Engelhardt &lt;jengelh@computergmbh.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Jan Engelhardt &lt;jengelh@computergmbh.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] MT: Scheduler support for SMT</title>
<updated>2008-01-29T10:14:57+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-03-02T20:42:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0ab7aefc4d43a6dee26c891b41ef9c7a67d2379b'/>
<id>0ab7aefc4d43a6dee26c891b41ef9c7a67d2379b</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Fix shadow register support.</title>
<updated>2007-11-15T23:21:49+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-11-08T18:02:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f6771dbb27c704ce837ba3bb1dcaa53f48f76ea8'/>
<id>f6771dbb27c704ce837ba3bb1dcaa53f48f76ea8</id>
<content type='text'>
Shadow register support would not possibly have worked on multicore
systems.  The support code for it was also depending not on MIPS R2 but
VSMP or SMTC kernels even though it makes perfect sense with UP kernels.

SR sets are a scarce resource and the expected usage pattern is that
users actually hardcode the register set numbers in their code.  So fix
the allocator by ditching it.  Move the remaining CPU probe bits into
the generic CPU probe.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Shadow register support would not possibly have worked on multicore
systems.  The support code for it was also depending not on MIPS R2 but
VSMP or SMTC kernels even though it makes perfect sense with UP kernels.

SR sets are a scarce resource and the expected usage pattern is that
users actually hardcode the register set numbers in their code.  So fix
the allocator by ditching it.  Move the remaining CPU probe bits into
the generic CPU probe.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Make facility to convert CPU types to strings generally available.</title>
<updated>2007-10-11T22:46:17+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-10-11T22:46:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9966db25defba4e1dce263246db25237bc24479f'/>
<id>9966db25defba4e1dce263246db25237bc24479f</id>
<content type='text'>
So far /proc/cpuinfo has been the only user but human readable processor
name are more useful than that for proc.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
So far /proc/cpuinfo has been the only user but human readable processor
name are more useful than that for proc.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Add support for BCM47XX CPUs.</title>
<updated>2007-10-11T22:46:02+00:00</updated>
<author>
<name>Aurelien Jarno</name>
<email>aurelien@aurel32.net</email>
</author>
<published>2007-09-25T13:40:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1c0c13eb935c95fd2ca0b0aca6dd4860487fb242'/>
<id>1c0c13eb935c95fd2ca0b0aca6dd4860487fb242</id>
<content type='text'>
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
    
It originally comes from the OpenWrt patches.
    
Cc: Michael Buesch &lt;mb@bu3sch.de&gt;
Cc: Felix Fietkau &lt;nbd@openwrt.org&gt;
Cc: Florian Schirmer &lt;jolt@tuxbox.org&gt;
Signed-off-by: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
    
It originally comes from the OpenWrt patches.
    
Cc: Michael Buesch &lt;mb@bu3sch.de&gt;
Cc: Felix Fietkau &lt;nbd@openwrt.org&gt;
Cc: Florian Schirmer &lt;jolt@tuxbox.org&gt;
Signed-off-by: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2</title>
<updated>2007-07-10T16:33:02+00:00</updated>
<author>
<name>Fuxin Zhang</name>
<email>zhangfx@lemote.com</email>
</author>
<published>2007-06-06T06:52:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2a21c7300b53b744d16903256a172d9cbcfdd03e'/>
<id>2a21c7300b53b744d16903256a172d9cbcfdd03e</id>
<content type='text'>
Signed-off-by: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
