<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/mips/kernel/proc.c, branch v3.12.29</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>MIPS: Get rid of MIPS I flag and test macros.</title>
<updated>2013-07-01T13:10:56+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-06-26T15:06:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1990e5429c2149a30a81ff634215c1aa76560a89'/>
<id>1990e5429c2149a30a81ff634215c1aa76560a89</id>
<content type='text'>
MIPS I is the ancestor of all MIPS ISA and architecture variants.  Anything
ever build in the MIPS empire is either MIPS I or at least contains MIPS I.
If it's running Linux, that is.

So there is little point in having cpu_has_mips_1 because it will always
evaluate as true - though usually only at runtime.  Thus there is no
point in having the MIPS_CPU_ISA_I ISA flag, so get rid of it.

Little complication: traps.c was using a test for a pure MIPS I ISA as
a test for an R3000-style cp0.  To deal with that, use a check for
cpu_has_3kex or cpu_has_4kex instead.

cpu_has_3kex is a new macro.  At the moment its default implementation is
!cpu_has_4kex but this may eventually change if Linux is ever going to
support the oddball MIPS processors R6000 and R8000 so users of either
of these macros should not make any assumptions.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/5551/
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
MIPS I is the ancestor of all MIPS ISA and architecture variants.  Anything
ever build in the MIPS empire is either MIPS I or at least contains MIPS I.
If it's running Linux, that is.

So there is little point in having cpu_has_mips_1 because it will always
evaluate as true - though usually only at runtime.  Thus there is no
point in having the MIPS_CPU_ISA_I ISA flag, so get rid of it.

Little complication: traps.c was using a test for a pure MIPS I ISA as
a test for an R3000-style cp0.  To deal with that, use a check for
cpu_has_3kex or cpu_has_4kex instead.

cpu_has_3kex is a new macro.  At the moment its default implementation is
!cpu_has_4kex but this may eventually change if Linux is ever going to
support the oddball MIPS processors R6000 and R8000 so users of either
of these macros should not make any assumptions.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/5551/
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Idle: Consolidate all declarations in &lt;asm/idle.h&gt;.</title>
<updated>2013-05-21T23:34:27+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-05-21T14:59:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bdc92d74e0ec95a8101447467c25f015105f2e5a'/>
<id>bdc92d74e0ec95a8101447467c25f015105f2e5a</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'mti-next' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next</title>
<updated>2013-05-09T15:57:30+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-05-09T15:57:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b22d1b6a91ca4260f869e349179ae53f18c664db'/>
<id>b22d1b6a91ca4260f869e349179ae53f18c664db</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: microMIPS: Add configuration option for microMIPS kernel.</title>
<updated>2013-05-09T15:55:19+00:00</updated>
<author>
<name>Steven J. Hill</name>
<email>Steven.Hill@imgtec.com</email>
</author>
<published>2013-03-25T18:27:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bce860833ab1e40113eb0efab34d0c8f3b0226b1'/>
<id>bce860833ab1e40113eb0efab34d0c8f3b0226b1</id>
<content type='text'>
This adds the option to build the Linux kernel using only the
microMIPS ISA. The resulting kernel binary is, at a minimum,
20% smaller than using the MIPS32R2 ISA.

Signed-off-by: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds the option to build the Linux kernel using only the
microMIPS ISA. The resulting kernel binary is, at a minimum,
20% smaller than using the MIPS32R2 ISA.

Signed-off-by: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: move mips_{set,get}_machine_name() to a more generic place</title>
<updated>2013-05-07T23:19:07+00:00</updated>
<author>
<name>John Crispin</name>
<email>blogic@openwrt.org</email>
</author>
<published>2013-04-11T05:34:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9169a5d01114c930a0494f9160da8c334d71680d'/>
<id>9169a5d01114c930a0494f9160da8c334d71680d</id>
<content type='text'>
Previously this functionality was only available to users of the mips_machine
api. Moving the code to prom.c allows us to also add a OF wrapper.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/5164/
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously this functionality was only available to users of the mips_machine
api. Moving the code to prom.c allows us to also add a OF wrapper.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/5164/
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Fix inconsistent formatting inside /proc/cpuinfo</title>
<updated>2013-03-13T22:08:36+00:00</updated>
<author>
<name>John Crispin</name>
<email>blogic@openwrt.org</email>
</author>
<published>2013-03-13T19:54:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a4285b99e0087361c61f51c819633382fa659ea6'/>
<id>a4285b99e0087361c61f51c819633382fa659ea6</id>
<content type='text'>
There is a missing " " inside /proc/cpuinfo.

The bad commit was:
commit a96102be700f87283f168942cd09a2b30f86f324
Author: Steven J. Hill &lt;sjhill@mips.com&gt;
Date:   Fri Dec 7 04:31:36 2012 +0000
MIPS: Add printing of ISA version in cpuinfo.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4988/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is a missing " " inside /proc/cpuinfo.

The bad commit was:
commit a96102be700f87283f168942cd09a2b30f86f324
Author: Steven J. Hill &lt;sjhill@mips.com&gt;
Date:   Fri Dec 7 04:31:36 2012 +0000
MIPS: Add printing of ISA version in cpuinfo.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4988/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next</title>
<updated>2013-02-21T11:51:33+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-02-21T11:51:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8bfc245f9ad7bd4e461179e4e7852ef99b8b6144'/>
<id>8bfc245f9ad7bd4e461179e4e7852ef99b8b6144</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Probe for and report hardware virtualization support.</title>
<updated>2013-02-19T08:36:36+00:00</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2013-02-16T22:42:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1e7decdb27ae89b2a0626635a8cf527f930bff1c'/>
<id>1e7decdb27ae89b2a0626635a8cf527f930bff1c</id>
<content type='text'>
The presence of the MIPS Virtualization Application-Specific Extension
is indicated by CP0_Config3[23].  Probe for this and report it in
/proc/cpuinfo.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4904/
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The presence of the MIPS Virtualization Application-Specific Extension
is indicated by CP0_Config3[23].  Probe for this and report it in
/proc/cpuinfo.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4904/
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Add support for the M14KEc core.</title>
<updated>2013-02-16T23:15:23+00:00</updated>
<author>
<name>Steven J. Hill</name>
<email>sjhill@mips.com</email>
</author>
<published>2012-12-07T03:51:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f8fa4811dbb264aef13f982e963389fd828b1ac0'/>
<id>f8fa4811dbb264aef13f982e963389fd828b1ac0</id>
<content type='text'>
Signed-off-by: Steven J. Hill &lt;sjhill@mips.com&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4682/
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Steven J. Hill &lt;sjhill@mips.com&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4682/
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Add printing of ISA version in cpuinfo.</title>
<updated>2013-02-15T22:07:38+00:00</updated>
<author>
<name>Steven J. Hill</name>
<email>sjhill@mips.com</email>
</author>
<published>2012-12-07T04:31:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a96102be700f87283f168942cd09a2b30f86f324'/>
<id>a96102be700f87283f168942cd09a2b30f86f324</id>
<content type='text'>
Display the MIPS ISA version release in the /proc/cpuinfo file.

[ralf@linux-mips.org: Add support for MIPS I ... IV legacy architecture
revisions.  Also differenciate between MIPS32 and MIPS64 versions instead
of lumping them together as just r1 and r2.

Note to application programmers: this indicates the CPU's ISA level
It does not imply the current execution environment does support it.  For
example an O32 application seeing "mips64r2" would still be restricted by
by the execution environment to 32-bit - but the kernel could run mips64r2
code.  The same for a 32-bit kernel running on a 64-bit processor.  This
field doesn't include ASEs or optional architecture modules nor other
detailed flags such as the availability of an FPU.]

Signed-off-by: Steven J. Hill &lt;sjhill@mips.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/4714/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Display the MIPS ISA version release in the /proc/cpuinfo file.

[ralf@linux-mips.org: Add support for MIPS I ... IV legacy architecture
revisions.  Also differenciate between MIPS32 and MIPS64 versions instead
of lumping them together as just r1 and r2.

Note to application programmers: this indicates the CPU's ISA level
It does not imply the current execution environment does support it.  For
example an O32 application seeing "mips64r2" would still be restricted by
by the execution environment to 32-bit - but the kernel could run mips64r2
code.  The same for a 32-bit kernel running on a 64-bit processor.  This
field doesn't include ASEs or optional architecture modules nor other
detailed flags such as the availability of an FPU.]

Signed-off-by: Steven J. Hill &lt;sjhill@mips.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/4714/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
