Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Some of these are architecturally required for R2 processors so lets try
to be bit closer to the real thing.  This also provides access to the
CPU cycle timer, even on multiprocessors.  In that aspect its currently
bug compatible to what would happen on a R2-based SMP.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Shadow register support would not possibly have worked on multicore
systems.  The support code for it was also depending not on MIPS R2 but
VSMP or SMTC kernels even though it makes perfect sense with UP kernels.

SR sets are a scarce resource and the expected usage pattern is that
users actually hardcode the register set numbers in their code.  So fix
the allocator by ditching it.  Move the remaining CPU probe bits into
the generic CPU probe.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

One of the easiest things to isolate is the pid printed in kernel log.
There was a patch, that made this for arch-independent code, this one makes
so for arch/xxx files.

It took some time to cross-compile it, but hopefully these are all the
printks in arch code.

Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org>
Signed-off-by: Pavel Emelyanov <xemul@openvz.org>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Userland, including the C library and the dynamic linker, is keen to use
the SYNC instruction, even for "generic" MIPS I binaries these days.
Which makes it less than useful on MIPS I processors.

This change adds the emulation, but as our do_ri() infrastructure was not
really prepared to take yet another instruction, I have rewritten it and
its callees slightly as follows.

Now there is only a single place a possible signal is thrown from.  The
place is at the end of do_ri().  The instruction word is fetched in
do_ri() and passed down to handlers.  The handlers are called in sequence
and return a result that lets the caller decide upon further processing.
If the result is positive, then the handler has picked the instruction,
but a signal should be thrown and the result is the signal number.  If the
result is zero, then the handler has successfully simulated the
instruction.  If the result is negative, then the handler did not handle
the instruction; to make it more obvious the calls do not follow the usual
0/-Exxx result convention they now return -1 instead of -EFAULT.

The calculation of the return EPC is now at the beginning.  The reason is
it is easier to handle it there as emulation callees may modify a register
and an instruction may be located in delay slot of a branch whose result
depends on the register.  It has to be undone if a signal is to be raised,
but it is not a problem as this is the slow-path case, and both actions
are done in single places now rather than the former being scattered
through emulation handlers.

The part of do_cpu() being covered follows the changes to do_ri().

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---

  CC      arch/mips/sgi-ip22/ip22-berr.o
arch/mips/sgi-ip22/ip22-berr.c: In function 'ip22_be_interrupt':
arch/mips/sgi-ip22/ip22-berr.c:100: warning: passing argument 2 of 'die_if_kernel' discards qualifiers from pointer target type

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

So far /proc/cpuinfo has been the only user but human readable processor
name are more useful than that for proc.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>