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<title>linux-toradex.git/arch/mips/math-emu, branch v3.17</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>MIPS: Fix MFC1 &amp; MFHC1 emulation for 64-bit MIPS systems</title>
<updated>2014-09-26T09:33:11+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2014-09-24T09:45:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c8c0da6bdf0f0d6f59fc23aab6ee373a131df82d'/>
<id>c8c0da6bdf0f0d6f59fc23aab6ee373a131df82d</id>
<content type='text'>
Commit bbd426f542cb "MIPS: Simplify FP context access" modified the
SIFROMREG &amp; SIFROMHREG macros such that they return unsigned rather
than signed 32b integers. I had believed that to be fine, but
inadvertently missed the MFC1 &amp; MFHC1 cases which write to a struct
pt_regs regs element. On MIPS32 this is fine, but on 64 bit those
saved regs' fields are 64 bit wide. Using unsigned values caused the
32 bit value from the FP register to be zero rather than sign extended
as the architecture specifies, causing incorrect emulation of the
MFC1 &amp; MFHc1 instructions. Fix by reintroducing the casts to signed
integers, and therefore the sign extension.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: stable@vger.kernel.org # v3.15+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7848/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Commit bbd426f542cb "MIPS: Simplify FP context access" modified the
SIFROMREG &amp; SIFROMHREG macros such that they return unsigned rather
than signed 32b integers. I had believed that to be fine, but
inadvertently missed the MFC1 &amp; MFHC1 cases which write to a struct
pt_regs regs element. On MIPS32 this is fine, but on 64 bit those
saved regs' fields are 64 bit wide. Using unsigned values caused the
32 bit value from the FP register to be zero rather than sign extended
as the architecture specifies, causing incorrect emulation of the
MFC1 &amp; MFHc1 instructions. Fix by reintroducing the casts to signed
integers, and therefore the sign extension.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: stable@vger.kernel.org # v3.15+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7848/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: math-emu: Fix instruction decoding.</title>
<updated>2014-07-30T17:13:35+00:00</updated>
<author>
<name>Rob Kendrick</name>
<email>rob.kendrick@codethink.co.uk</email>
</author>
<published>2014-07-23T09:03:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c3b9b945e02e011c63522761e91133ea43eb6939'/>
<id>c3b9b945e02e011c63522761e91133ea43eb6939</id>
<content type='text'>
Tested-by: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Reviewed-by: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
Tested-by: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Reviewed-by: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: math-emu: Reduce code duplication.</title>
<updated>2014-06-26T09:47:55+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-06-13T14:36:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fb738f8544d8ceb3599598f3500f33bf6ff2fca4'/>
<id>fb738f8544d8ceb3599598f3500f33bf6ff2fca4</id>
<content type='text'>
The fix in the preceeding commit did do exactly the same thing in two
places showing some code cleanup was due.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The fix in the preceeding commit did do exactly the same thing in two
places showing some code cleanup was due.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: math-emu: Work around limitations of older GCC.</title>
<updated>2014-06-16T11:47:47+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-06-13T14:26:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=91496ea9f86f55e87be78ecc88c8a6b7e3802601'/>
<id>91496ea9f86f55e87be78ecc88c8a6b7e3802601</id>
<content type='text'>
Older GCC doesn't get named initializations of anonymous structs right,
that is members are not initializable in the containing structure through
name however old style initializations are working fine.

The issue exists with gcc up to 4.5.x.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
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<pre>
Older GCC doesn't get named initializations of anonymous structs right,
that is members are not initializable in the containing structure through
name however old style initializations are working fine.

The issue exists with gcc up to 4.5.x.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: OCTEON: Enable use of FPU</title>
<updated>2014-05-30T19:01:09+00:00</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2014-05-28T21:52:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a36d8225bceba4b7be47ade34d175945f85cffbc'/>
<id>a36d8225bceba4b7be47ade34d175945f85cffbc</id>
<content type='text'>
Some versions of the assembler will not assemble CFC1 for OCTEON, so
override the ISA for these.

Add r4k_fpu.o to handle low level FPU initialization.

Modify octeon_switch.S to save the FPU registers.  And include
r4k_switch.S to pick up more FPU support.

Get rid of "#define cpu_has_fpu		0"

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Signed-off-by: Andreas Herrmann &lt;andreas.herrmann@caviumnetworks.com&gt;
Cc: linux-mips@linux-mips.org
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7006/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some versions of the assembler will not assemble CFC1 for OCTEON, so
override the ISA for these.

Add r4k_fpu.o to handle low level FPU initialization.

Modify octeon_switch.S to save the FPU registers.  And include
r4k_switch.S to pick up more FPU support.

Get rid of "#define cpu_has_fpu		0"

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Signed-off-by: Andreas Herrmann &lt;andreas.herrmann@caviumnetworks.com&gt;
Cc: linux-mips@linux-mips.org
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7006/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: math-emu: Add IEEE754 exception statistics to debugfs</title>
<updated>2014-05-30T09:55:23+00:00</updated>
<author>
<name>Deng-Cheng Zhu</name>
<email>dengcheng.zhu@imgtec.com</email>
</author>
<published>2014-05-29T19:26:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c410352699e2a1adc77969f19eb63030e610d048'/>
<id>c410352699e2a1adc77969f19eb63030e610d048</id>
<content type='text'>
Sometimes it's useful to let the user, while doing performance research,
know what in the IEEE754 exceptions has caused many times of FP emulation
when running a specific application. This patch adds 5 more files to
/sys/kernel/debug/mips/fpuemustats/, whose filenames begin with "ieee754".
These stats are in addition to the existing cp1ops, cp1xops, errors, loads
and stores, which may not be useful in understanding the reasons of ieee754
exceptions.

[ralf@linux-mips.org: Fixed reject due to other changes to the kernel
FP assist software.]

Signed-off-by: Deng-Cheng Zhu &lt;dengcheng.zhu@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: Steven.Hill@imgtec.com
Cc: james.hogan@imgtec.com
Patchwork: http://patchwork.linux-mips.org/patch/7044/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Sometimes it's useful to let the user, while doing performance research,
know what in the IEEE754 exceptions has caused many times of FP emulation
when running a specific application. This patch adds 5 more files to
/sys/kernel/debug/mips/fpuemustats/, whose filenames begin with "ieee754".
These stats are in addition to the existing cp1ops, cp1xops, errors, loads
and stores, which may not be useful in understanding the reasons of ieee754
exceptions.

[ralf@linux-mips.org: Fixed reject due to other changes to the kernel
FP assist software.]

Signed-off-by: Deng-Cheng Zhu &lt;dengcheng.zhu@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: Steven.Hill@imgtec.com
Cc: james.hogan@imgtec.com
Patchwork: http://patchwork.linux-mips.org/patch/7044/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: math-emu: Reduce microMIPS bloat.</title>
<updated>2014-05-23T13:12:38+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-04-30T09:09:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=70e4c234aa48e11c0575364939dfab4cb27b2172'/>
<id>70e4c234aa48e11c0575364939dfab4cb27b2172</id>
<content type='text'>
Move microMIPS32_to_MIPS32() to a separate file which only gets built
for mipsMIPS configurations; for other configurations the optimizer
eleminates calls to microMIPS32_to_MIPS32().

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move microMIPS32_to_MIPS32() to a separate file which only gets built
for mipsMIPS configurations; for other configurations the optimizer
eleminates calls to microMIPS32_to_MIPS32().

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: math-emu: Switch to using the MIPS rounding modes.</title>
<updated>2014-05-23T13:12:38+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-04-30T09:21:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=56a6473339dbd2e908cf8c6f2856d5de2bf8d15b'/>
<id>56a6473339dbd2e908cf8c6f2856d5de2bf8d15b</id>
<content type='text'>
Previously math-emu was using the IEEE-754 constants internally.  These
were differing by having the constants for rounding to +/- infinity
switched, so a conversion was necessary.  This would be entirely
avoidable if the MIPS constants were used throughout, so get rid of
the bloat.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously math-emu was using the IEEE-754 constants internally.  These
were differing by having the constants for rounding to +/- infinity
switched, so a conversion was necessary.  This would be entirely
avoidable if the MIPS constants were used throughout, so get rid of
the bloat.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: math-emu: Nuke alternative names for IEEE-754 rounding modes.</title>
<updated>2014-05-23T13:12:37+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-04-29T23:17:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=aef3fb76aa1390ef864db888d06d8fcd5510df2d'/>
<id>aef3fb76aa1390ef864db888d06d8fcd5510df2d</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Sort out mm_isBranchInstr.</title>
<updated>2014-05-23T13:12:37+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-04-29T13:21:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=76fbfc318de2eb0eb4823095ece020f999a17c63'/>
<id>76fbfc318de2eb0eb4823095ece020f999a17c63</id>
<content type='text'>
mm_isBranchInstr() did reside in the math emu code even though it logically
is separate and also is used outside the math emu code.  In addition GCC 4.9.0
leaves the following unnnecessarily bloated function body for a non-microMIPS
configuration:

&lt;mm_isBranchInstr&gt;:
    105c:       afa50004        sw      a1,4(sp)
    1060:       afa60008        sw      a2,8(sp)
    1064:       afa7000c        sw      a3,12(sp)
    1068:       03e00008        jr      ra
    106c:       00001021        move    v0,zero

which stores arguments that are never going to be used on the stack frame.

Move mm_isBranchInstr() from cp1emu.c to branch.c, then split mm_isBranchInstr()
into a __mm_isBranchInstr() core and a mm_isBranchInstr() wrapper inline function
which only invokes __mm_isBranchInstr() on microMIPS configurations.

This shaves off 112 bytes off the kernel and improves code flow a bit.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
mm_isBranchInstr() did reside in the math emu code even though it logically
is separate and also is used outside the math emu code.  In addition GCC 4.9.0
leaves the following unnnecessarily bloated function body for a non-microMIPS
configuration:

&lt;mm_isBranchInstr&gt;:
    105c:       afa50004        sw      a1,4(sp)
    1060:       afa60008        sw      a2,8(sp)
    1064:       afa7000c        sw      a3,12(sp)
    1068:       03e00008        jr      ra
    106c:       00001021        move    v0,zero

which stores arguments that are never going to be used on the stack frame.

Move mm_isBranchInstr() from cp1emu.c to branch.c, then split mm_isBranchInstr()
into a __mm_isBranchInstr() core and a mm_isBranchInstr() wrapper inline function
which only invokes __mm_isBranchInstr() on microMIPS configurations.

This shaves off 112 bytes off the kernel and improves code flow a bit.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
