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<title>linux-toradex.git/arch/mips/power, branch v2.6.32</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>MIPS: Use PAGE_SIZE in assembly instead of _PAGE_SIZE.</title>
<updated>2009-09-17T18:07:48+00:00</updated>
<author>
<name>Nelson Elhage</name>
<email>nelhage@ksplice.com</email>
</author>
<published>2009-07-31T20:58:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a0b54e256d513ed99e456bea6e4e188ff92e7c46'/>
<id>a0b54e256d513ed99e456bea6e4e188ff92e7c46</id>
<content type='text'>
Now that PAGE_SIZE is available to assembly directly, there is no need
to separately expose it as _PAGE_SIZE through asm-offsets.

In addition, remove _PAGE_SHIFT from asm-offsets, since it was never
needed, and is not used anywhere.

Signed-off-by: Nelson Elhage &lt;nelhage@ksplice.com&gt;
Signed-off-by: Tim Abbott &lt;tabbott@ksplice.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that PAGE_SIZE is available to assembly directly, there is no need
to separately expose it as _PAGE_SIZE through asm-offsets.

In addition, remove _PAGE_SHIFT from asm-offsets, since it was never
needed, and is not used anywhere.

Signed-off-by: Nelson Elhage &lt;nelhage@ksplice.com&gt;
Signed-off-by: Tim Abbott &lt;tabbott@ksplice.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Hibernation: Remove SMP TLB and cacheflushing code.</title>
<updated>2009-06-24T17:34:39+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2009-06-19T14:01:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=44eeab67416711db9b84610ef18c99a60415dff8'/>
<id>44eeab67416711db9b84610ef18c99a60415dff8</id>
<content type='text'>
We can't perform any flushes on SMP from swsusp_arch_resume because
interrupts are disabled.  A cross-CPU flush is unnecessary anyway
because all but the local CPU have already been disabled.  A local
flush is not needed either because we didn't change any mappings.  So
just delete the code.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We can't perform any flushes on SMP from swsusp_arch_resume because
interrupts are disabled.  A cross-CPU flush is unnecessary anyway
because all but the local CPU have already been disabled.  A local
flush is not needed either because we didn't change any mappings.  So
just delete the code.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Add hibernation support</title>
<updated>2009-06-17T10:06:31+00:00</updated>
<author>
<name>Wu Zhangjin</name>
<email>wuzj@lemote.com</email>
</author>
<published>2009-06-04T12:27:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=363c55cae53742f3f685a1814912c6d4fda245b4'/>
<id>363c55cae53742f3f685a1814912c6d4fda245b4</id>
<content type='text'>
[Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
support.  As implemented in this patch cache and tlb flushing will also be
invoked with interrupts disabled so smp_call_function() will blow up in
charming ways.  So limit to !SMP.]

Reviewed-by: Pavel Machek &lt;pavel@ucw.cz&gt;
Reviewed-by: Yan Hua &lt;yanh@lemote.com&gt;
Reviewed-by: Arnaud Patard &lt;apatard@mandriva.com&gt;
Reviewed-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Wu Zhangjin &lt;wuzj@lemote.com&gt;
Signed-off-by: Hu Hongbing &lt;huhb@lemote.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
support.  As implemented in this patch cache and tlb flushing will also be
invoked with interrupts disabled so smp_call_function() will blow up in
charming ways.  So limit to !SMP.]

Reviewed-by: Pavel Machek &lt;pavel@ucw.cz&gt;
Reviewed-by: Yan Hua &lt;yanh@lemote.com&gt;
Reviewed-by: Arnaud Patard &lt;apatard@mandriva.com&gt;
Reviewed-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Wu Zhangjin &lt;wuzj@lemote.com&gt;
Signed-off-by: Hu Hongbing &lt;huhb@lemote.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
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</content>
</entry>
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