<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/mips, branch tegra</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>MIPS: Call oops_enter, oops_exit in die</title>
<updated>2011-10-01T19:36:04+00:00</updated>
<author>
<name>Nathan Lynch</name>
<email>ntl@pobox.com</email>
</author>
<published>2011-09-30T18:49:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8742cd23471635f8b069bf9a6806200a77397ddb'/>
<id>8742cd23471635f8b069bf9a6806200a77397ddb</id>
<content type='text'>
This allows pause_on_oops and mtdoops to work.

Signed-off-by: Nathan Lynch &lt;ntl@pobox.com&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2810/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This allows pause_on_oops and mtdoops to work.

Signed-off-by: Nathan Lynch &lt;ntl@pobox.com&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2810/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Octeon: Enable C0_UserLocal probing.</title>
<updated>2011-09-23T23:44:41+00:00</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2011-07-05T23:35:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2f19d080fb14bdddf11bf54d4db6306235c46c99'/>
<id>2f19d080fb14bdddf11bf54d4db6306235c46c99</id>
<content type='text'>
Octeon2 processor cores have a UserLocal register.  Remove the hard
coded negative probe and allow the standard probing to detect this
feature.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2578/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Octeon2 processor cores have a UserLocal register.  Remove the hard
coded negative probe and allow the standard probing to detect this
feature.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2578/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: No branches in delay slots for huge pages in handle_tlbl</title>
<updated>2011-09-21T15:54:07+00:00</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2011-09-17T01:06:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0f4ccbc835036cbcc2513585bb2e93ee62e12674'/>
<id>0f4ccbc835036cbcc2513585bb2e93ee62e12674</id>
<content type='text'>
For the case PM_DEFAULT_MASK == 0, we were placing a branch in the
delay slot of another branch.  This leads to undefined behavior.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2775/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For the case PM_DEFAULT_MASK == 0, we were placing a branch in the
delay slot of another branch.  This leads to undefined behavior.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2775/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Don't clobber CP0_STATUS value for CONFIG_MIPS_MT_SMTC</title>
<updated>2011-09-21T15:54:02+00:00</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2011-08-30T13:45:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d968275921f9fa7fbc602ac6618ffec6a062ee3c'/>
<id>d968275921f9fa7fbc602ac6618ffec6a062ee3c</id>
<content type='text'>
Reported-by: Edgar E. Iglesias &lt;edgar.iglesias@gmail.com&gt;
Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/2753/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Reported-by: Edgar E. Iglesias &lt;edgar.iglesias@gmail.com&gt;
Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/2753/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Octeon: Select CONFIG_HOLES_IN_ZONE</title>
<updated>2011-09-21T15:53:56+00:00</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2011-08-20T15:44:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=465aaed0030b23d905f3eca5e65481773bea9ea1'/>
<id>465aaed0030b23d905f3eca5e65481773bea9ea1</id>
<content type='text'>
Current Octeon systems do in fact have holes in their memory zones.
We need to select HOLES_IN_ZONE.  If we do not, some memory
configurations will result in crashes at boot time like this:

.
.
.
CPU 6 Unable to handle kernel paging request at virtual address 0000000000700000, epc == ffffffff8118fe00, ra == ffffffff8118fe9c
Oops[#1]:
Cpu 6
.
.
.
        ...
Call Trace:
[&lt;ffffffff8118fe00&gt;] setup_per_zone_wmarks+0x1b0/0x338
[&lt;ffffffff815cd738&gt;] init_per_zone_wmark_min+0x64/0xd0
[&lt;ffffffff81100438&gt;] do_one_initcall+0x38/0x160
.
.
.

Reported-by: Jason Kwon &lt;jason.kwon@ericsson.com&gt;
Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
To: linux-mips@linux-mips.org
Cc: Jason Kwon &lt;jason.kwon@ericsson.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/2724/
Tested-by: Guenter Roeck&lt;guenter.roeck@ericsson.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Current Octeon systems do in fact have holes in their memory zones.
We need to select HOLES_IN_ZONE.  If we do not, some memory
configurations will result in crashes at boot time like this:

.
.
.
CPU 6 Unable to handle kernel paging request at virtual address 0000000000700000, epc == ffffffff8118fe00, ra == ffffffff8118fe9c
Oops[#1]:
Cpu 6
.
.
.
        ...
Call Trace:
[&lt;ffffffff8118fe00&gt;] setup_per_zone_wmarks+0x1b0/0x338
[&lt;ffffffff815cd738&gt;] init_per_zone_wmark_min+0x64/0xd0
[&lt;ffffffff81100438&gt;] do_one_initcall+0x38/0x160
.
.
.

Reported-by: Jason Kwon &lt;jason.kwon@ericsson.com&gt;
Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
To: linux-mips@linux-mips.org
Cc: Jason Kwon &lt;jason.kwon@ericsson.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/2724/
Tested-by: Guenter Roeck&lt;guenter.roeck@ericsson.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: PM: Use struct syscore_ops instead of sysdevs for PM (v2)</title>
<updated>2011-09-21T15:53:51+00:00</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rjw@sisk.pl</email>
</author>
<published>2011-06-02T19:06:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bd7100099a46b59f433dd15ad60adbb4d4f3d625'/>
<id>bd7100099a46b59f433dd15ad60adbb4d4f3d625</id>
<content type='text'>
Convert some MIPS architecture's code to using struct syscore_ops
objects for power management instead of sysdev classes and sysdevs.

This simplifies the code and reduces the kernel's memory footprint.
It also is necessary for removing sysdevs from the kernel entirely in
the future.

Signed-off-by: Rafael J. Wysocki &lt;rjw@sisk.pl&gt;
Acked-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
Acked-and-tested-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: linux-kernel@vger.kernel.org
Cc: "Rafael J.  Wysocki" &lt;rjw@sisk.pl&gt;
Patchwork: http://patchwork.linux-mips.org/patch/2431/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert some MIPS architecture's code to using struct syscore_ops
objects for power management instead of sysdev classes and sysdevs.

This simplifies the code and reduces the kernel's memory footprint.
It also is necessary for removing sysdevs from the kernel entirely in
the future.

Signed-off-by: Rafael J. Wysocki &lt;rjw@sisk.pl&gt;
Acked-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
Acked-and-tested-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: linux-kernel@vger.kernel.org
Cc: "Rafael J.  Wysocki" &lt;rjw@sisk.pl&gt;
Patchwork: http://patchwork.linux-mips.org/patch/2431/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Compat: Use 32-bit wrapper for compat_sys_futex.</title>
<updated>2011-09-21T15:53:44+00:00</updated>
<author>
<name>Yong Zhang</name>
<email>yong.zhang@windriver.com</email>
</author>
<published>2011-08-16T01:54:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1eec6cd08b4feb72a73aff468ab72bdd21e1dc61'/>
<id>1eec6cd08b4feb72a73aff468ab72bdd21e1dc61</id>
<content type='text'>
We can't trust userspace to pass signed-extend arguments.  Not correctly
sign-extended arguments to futex-wait result in architecturally undefined
operation of 32-bit arithmetic instructions.

For example, if 'val' is too big and bit-31 is 1, the caller may enter
endless loop at:

futex_wait_setup()
{
	...

	if (uval != val) {
		queue_unlock(q, *hb);
		ret = -EWOULDBLOCK;

	...
}

Signed-off-by: Yong Zhang &lt;yong.zhang@windriver.com&gt;
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2714/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We can't trust userspace to pass signed-extend arguments.  Not correctly
sign-extended arguments to futex-wait result in architecturally undefined
operation of 32-bit arithmetic instructions.

For example, if 'val' is too big and bit-31 is 1, the caller may enter
endless loop at:

futex_wait_setup()
{
	...

	if (uval != val) {
		queue_unlock(q, *hb);
		ret = -EWOULDBLOCK;

	...
}

Signed-off-by: Yong Zhang &lt;yong.zhang@windriver.com&gt;
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2714/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Do not use EXTRA_CFLAGS</title>
<updated>2011-09-21T15:53:38+00:00</updated>
<author>
<name>Arnaud Lacombe</name>
<email>lacombar@gmail.com</email>
</author>
<published>2011-08-15T17:07:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b8ecf341f1b7ca7bf3cb80c48cbbae33b79947d0'/>
<id>b8ecf341f1b7ca7bf3cb80c48cbbae33b79947d0</id>
<content type='text'>
Usage of these flags has been deprecated for nearly 4 years by:

    commit f77bf01425b11947eeb3b5b54685212c302741b8
    Author: Sam Ravnborg &lt;sam@neptun.(none)&gt;
    Date:   Mon Oct 15 22:25:06 2007 +0200

        kbuild: introduce ccflags-y, asflags-y and ldflags-y

Moreover, these flags (at least EXTRA_CFLAGS) have been documented for command
line use. By default, gmake(1) do not override command line setting, so this is
likely to result in build failure or unexpected behavior.

Replace their usage by Kbuild's `{as,cc,ld}flags-y'.

To: linux-kernel@vger.kernel.org
Cc: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/2710/
Cc: linux-mips@linux-mips.org
Signed-off-by: Arnaud Lacombe &lt;lacombar@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Usage of these flags has been deprecated for nearly 4 years by:

    commit f77bf01425b11947eeb3b5b54685212c302741b8
    Author: Sam Ravnborg &lt;sam@neptun.(none)&gt;
    Date:   Mon Oct 15 22:25:06 2007 +0200

        kbuild: introduce ccflags-y, asflags-y and ldflags-y

Moreover, these flags (at least EXTRA_CFLAGS) have been documented for command
line use. By default, gmake(1) do not override command line setting, so this is
likely to result in build failure or unexpected behavior.

Replace their usage by Kbuild's `{as,cc,ld}flags-y'.

To: linux-kernel@vger.kernel.org
Cc: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/2710/
Cc: linux-mips@linux-mips.org
Signed-off-by: Arnaud Lacombe &lt;lacombar@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Alchemy: DB1200: Disable cascade IRQ in handler</title>
<updated>2011-09-21T15:53:32+00:00</updated>
<author>
<name>Manuel Lauss</name>
<email>manuel.lauss@googlemail.com</email>
</author>
<published>2011-08-12T06:28:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=dd0a028183369cccc0826199a7ccdc850ece289b'/>
<id>dd0a028183369cccc0826199a7ccdc850ece289b</id>
<content type='text'>
Disable the cascade IRQ in the cascade handler.  This is required to
get the DB1300 working, and also gets rid of all spurious interrupts
previously observed on the DB1200; so Config[OD] can be disabled
again for better performance.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@googlemail.com&gt;
To: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/2708/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Disable the cascade IRQ in the cascade handler.  This is required to
get the DB1300 working, and also gets rid of all spurious interrupts
previously observed on the DB1200; so Config[OD] can be disabled
again for better performance.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@googlemail.com&gt;
To: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/2708/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Lantiq: Fix setting the PCI bus speed on AR9</title>
<updated>2011-09-21T15:53:18+00:00</updated>
<author>
<name>John Crispin</name>
<email>blogic@openwrt.org</email>
</author>
<published>2011-07-18T16:04:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0596954681859f1b7b7adfd58fa738c09ed2affa'/>
<id>0596954681859f1b7b7adfd58fa738c09ed2affa</id>
<content type='text'>
The bits used to set the PCI bus speed on AR9 are slightly different to
those used on Danube.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2614/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The bits used to set the PCI bus speed on AR9 are slightly different to
those used on Danube.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2614/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
