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<title>linux-toradex.git/arch/mips, branch v2.6.30-rc7</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>MIPS: IP32: Remove unnecessary if not even harmful volatile keywords.</title>
<updated>2009-05-22T12:52:06+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2009-05-22T09:58:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d2f82c2f70d56ba4623de25edb383fec01f43b89'/>
<id>d2f82c2f70d56ba4623de25edb383fec01f43b89</id>
<content type='text'>
They are unneeded and as the issue fixed in lmo commit
63f7ec59053e3f850ab67a9938e631bcba64c6ce shows even harmful.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
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<pre>
They are unneeded and as the issue fixed in lmo commit
63f7ec59053e3f850ab67a9938e631bcba64c6ce shows even harmful.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: IP32: Fix build error due to uninitialized variable.</title>
<updated>2009-05-22T12:52:06+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2009-05-22T09:48:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=63c901c7e6fb878805cd2f8f14fa3eee8c03ee84'/>
<id>63c901c7e6fb878805cd2f8f14fa3eee8c03ee84</id>
<content type='text'>
  CC      arch/mips/sgi-ip32/ip32-reset.o
cc1: warnings being treated as errors
arch/mips/sgi-ip32/ip32-reset.c: In function 'debounce':
arch/mips/sgi-ip32/ip32-reset.c:97: error: 'reg_a' is used uninitialized in this function

The issues is old but due to the volatile keyword gcc older than 4.4 did
not warn about this obvious bug.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
  CC      arch/mips/sgi-ip32/ip32-reset.o
cc1: warnings being treated as errors
arch/mips/sgi-ip32/ip32-reset.c: In function 'debounce':
arch/mips/sgi-ip32/ip32-reset.c:97: error: 'reg_a' is used uninitialized in this function

The issues is old but due to the volatile keyword gcc older than 4.4 did
not warn about this obvious bug.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Fix sparse warning in incompatiable argument type of clear_user.</title>
<updated>2009-05-22T12:52:05+00:00</updated>
<author>
<name>Wu Zhangjin</name>
<email>wuzhangjin@gmail.com</email>
</author>
<published>2009-05-20T21:50:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=63d3892379f93b73ef905fb3449f4e4438a53b40'/>
<id>63d3892379f93b73ef905fb3449f4e4438a53b40</id>
<content type='text'>
The type of the second argument of access_ok should be (void __user *).
The unnecessary conversion of the clear_user address argument was causing
sparse to emit warnings on the __chk_user_ptr check.

Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
The type of the second argument of access_ok should be (void __user *).
The unnecessary conversion of the clear_user address argument was causing
sparse to emit warnings on the __chk_user_ptr check.

Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: 64-bit: Fix system lockup.</title>
<updated>2009-05-20T17:53:14+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@snapgear.com</email>
</author>
<published>2009-05-20T06:12:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a5e696e5d0f1377ff6beb10d2f40edb6a3d1de18'/>
<id>a5e696e5d0f1377ff6beb10d2f40edb6a3d1de18</id>
<content type='text'>
The address range size calculation inside local_flush_tlb_kernel_range()
is being truncated by a too small size variable holder on 64-bit systems.
The truncated size can result in an erroneous tlbsize check that means we
sit spinning inside a loop trying to flush a hige number of TLB entries.
This is for all intents and purposes a system hang. Fix by using an
appropriately sized valiable to hold the size.

[Ralf: Greg's original patch submission identified the issue and fixed one
instance in tlb-r4k.c but there there were several more.  For consistency
I also modified tlb-r3k.c even though that file is only used on 32-bit.]

Signed-off-by: Greg Ungerer &lt;gerg@snapgear.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
The address range size calculation inside local_flush_tlb_kernel_range()
is being truncated by a too small size variable holder on 64-bit systems.
The truncated size can result in an erroneous tlbsize check that means we
sit spinning inside a loop trying to flush a hige number of TLB entries.
This is for all intents and purposes a system hang. Fix by using an
appropriately sized valiable to hold the size.

[Ralf: Greg's original patch submission identified the issue and fixed one
instance in tlb-r4k.c but there there were several more.  For consistency
I also modified tlb-r3k.c even though that file is only used on 32-bit.]

Signed-off-by: Greg Ungerer &lt;gerg@snapgear.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: IP28: Change to build with -mr10k-cache-barrier=store</title>
<updated>2009-05-20T17:53:13+00:00</updated>
<author>
<name>peter fuerst</name>
<email>post@pfrst.de</email>
</author>
<published>2009-05-17T21:49:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=195d1a96ae5fdfbedb8dc4b97afee578921fa99e'/>
<id>195d1a96ae5fdfbedb8dc4b97afee578921fa99e</id>
<content type='text'>
Richard Sandiford's new code for inserting the cache-barriers, for GCC
4.3 and above and already incorporated in the current GCC-release, uses
a slightly different option-syntax.

Signed-off-by: peter fuerst &lt;post@pfrst.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
Richard Sandiford's new code for inserting the cache-barriers, for GCC
4.3 and above and already incorporated in the current GCC-release, uses
a slightly different option-syntax.

Signed-off-by: peter fuerst &lt;post@pfrst.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: IP22: Fix hang in power button interrupt handler</title>
<updated>2009-05-20T17:53:13+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2009-05-16T11:23:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7e9e05cad94217498e4d9bd6ef7137b4e9e7ed64'/>
<id>7e9e05cad94217498e4d9bd6ef7137b4e9e7ed64</id>
<content type='text'>
The hang was caused by the use of disable_irq() from the interrupt handler
itself.  Fixed by the use of disable_irq_nosync().  The issue was
triggered by:

    commit 3aa551c9b4c40018f0e261a178e3d25478dc04a9
    Author: Thomas Gleixner &lt;tglx@linutronix.de&gt;
    Date:   Mon Mar 23 18:28:15 2009 +0100

        genirq: add threaded interrupt handler support

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
The hang was caused by the use of disable_irq() from the interrupt handler
itself.  Fixed by the use of disable_irq_nosync().  The issue was
triggered by:

    commit 3aa551c9b4c40018f0e261a178e3d25478dc04a9
    Author: Thomas Gleixner &lt;tglx@linutronix.de&gt;
    Date:   Mon Mar 23 18:28:15 2009 +0100

        genirq: add threaded interrupt handler support

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: IP32: Fix hang on shutdown in power button interrupt handler.</title>
<updated>2009-05-20T17:53:13+00:00</updated>
<author>
<name>Andrew Randrianasulu</name>
<email>randrik_a@yahoo.com</email>
</author>
<published>2009-05-14T18:29:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=950312ce22696ddfa42a957bdadaa9c24151e679'/>
<id>950312ce22696ddfa42a957bdadaa9c24151e679</id>
<content type='text'>
The hang was caused by the use of disable_irq() from the interrupt handler
itself.  Fixed by the use of disable_irq_nosync().  The issue was
triggered by:

    commit 3aa551c9b4c40018f0e261a178e3d25478dc04a9
    Author: Thomas Gleixner &lt;tglx@linutronix.de&gt;
    Date:   Mon Mar 23 18:28:15 2009 +0100

        genirq: add threaded interrupt handler support

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The hang was caused by the use of disable_irq() from the interrupt handler
itself.  Fixed by the use of disable_irq_nosync().  The issue was
triggered by:

    commit 3aa551c9b4c40018f0e261a178e3d25478dc04a9
    Author: Thomas Gleixner &lt;tglx@linutronix.de&gt;
    Date:   Mon Mar 23 18:28:15 2009 +0100

        genirq: add threaded interrupt handler support

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Sibyte: Fix locking in set_irq_affinity</title>
<updated>2009-05-14T12:50:30+00:00</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2009-05-04T21:51:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5d81b83d03eb32085c569854695e102dde7af544'/>
<id>5d81b83d03eb32085c569854695e102dde7af544</id>
<content type='text'>
Locking of irq_desc is now done in irq_set_affinity; don't lock it again
in chip specific set_affinity function.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
Locking of irq_desc is now done in irq_set_affinity; don't lock it again
in chip specific set_affinity function.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Use force_sig when handling address errors.</title>
<updated>2009-05-14T12:50:29+00:00</updated>
<author>
<name>David Daney</name>
<email>ddaney@caviumnetworks.com</email>
</author>
<published>2009-05-05T19:49:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a6d5ff04e83b36e0d5c2c50ef4d18e9f38b5abc2'/>
<id>a6d5ff04e83b36e0d5c2c50ef4d18e9f38b5abc2</id>
<content type='text'>
When init is started it is SIGNAL_UNKILLABLE.  If it were to get an
address error, we would try to send it SIGBUS, but it would be ignored
and the faulting instruction restarted.  This results in an endless
loop.

We need to use force_sig() instead so it will actually die and give us
some useful information.

Reported-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
When init is started it is SIGNAL_UNKILLABLE.  If it were to get an
address error, we would try to send it SIGBUS, but it would be ignored
and the faulting instruction restarted.  This results in an endless
loop.

We need to use force_sig() instead so it will actually die and give us
some useful information.

Reported-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Cavium: Add struct clocksource * argument to octeon_cvmcount_read()</title>
<updated>2009-05-14T12:50:29+00:00</updated>
<author>
<name>Coly Li</name>
<email>coly.li@suse.de</email>
</author>
<published>2009-04-22T19:06:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d0ce9a5a47113eec041a0972a0b86134b8fd2828'/>
<id>d0ce9a5a47113eec041a0972a0b86134b8fd2828</id>
<content type='text'>
This patch modifies parameter of octeon_cvmcount_read() from 'void' to
'struct clocksource *cs', which fixes compile warning for incompatible
parameter type.

Signed-off-by: Coly Li &lt;coly.li@suse.de&gt;
Cc: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Reviewed-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
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<pre>
This patch modifies parameter of octeon_cvmcount_read() from 'void' to
'struct clocksource *cs', which fixes compile warning for incompatible
parameter type.

Signed-off-by: Coly Li &lt;coly.li@suse.de&gt;
Cc: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Reviewed-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
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