<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/mips, branch v2.6.34</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>    MIPS: Oprofile: Fix Loongson irq handler</title>
<updated>2010-05-15T20:59:54+00:00</updated>
<author>
<name>Wu Zhangjin</name>
<email>wuzhangjin@gmail.com</email>
</author>
<published>2010-05-06T16:59:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4e73238d163c6fcf001264832701d2a6d4927672'/>
<id>4e73238d163c6fcf001264832701d2a6d4927672</id>
<content type='text'>
    
    The interrupt enable bit for the performance counters is in the Control
    Register $24, not in the counter register.
    loongson2_perfcount_handler(), we need to use
    
    Reported-by: Xu Hengyang &lt;hengyang@mail.ustc.edu.cn&gt;
    Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
    Cc: linux-mips@linux-mips.org
    Patchwork: http://patchwork.linux-mips.org/patch/1198/
    Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
    
    The interrupt enable bit for the performance counters is in the Control
    Register $24, not in the counter register.
    loongson2_perfcount_handler(), we need to use
    
    Reported-by: Xu Hengyang &lt;hengyang@mail.ustc.edu.cn&gt;
    Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
    Cc: linux-mips@linux-mips.org
    Patchwork: http://patchwork.linux-mips.org/patch/1198/
    Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</pre>
</div>
</content>
</entry>
<entry>
<title>    MIPS: N32: Use compat version for sys_ppoll.</title>
<updated>2010-05-15T20:59:53+00:00</updated>
<author>
<name>Chandrakala Chavva</name>
<email>cchavva@caviumnetworks.com</email>
</author>
<published>2010-05-11T00:11:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=46afb8296c2494bfce17064124b253eb9b176ef9'/>
<id>46afb8296c2494bfce17064124b253eb9b176ef9</id>
<content type='text'>
    
    The sys_ppoll() takes struct 'struct timespec'. This is different for the
    N32 and N64 ABIs. Use the compat version to do the proper conversions.
    
    Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
    To: linux-mips@linux-mips.org
    Patchwork: http://patchwork.linux-mips.org/patch/1210/
    Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
    
    The sys_ppoll() takes struct 'struct timespec'. This is different for the
    N32 and N64 ABIs. Use the compat version to do the proper conversions.
    
    Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
    To: linux-mips@linux-mips.org
    Patchwork: http://patchwork.linux-mips.org/patch/1210/
    Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</pre>
</div>
</content>
</entry>
<entry>
<title>    MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1</title>
<updated>2010-05-15T20:59:53+00:00</updated>
<author>
<name>Shane McDonald</name>
<email>mcdonald.shane@gmail.com</email>
</author>
<published>2010-05-07T05:26:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=95e8f634d7a3ea5af40ec3fa42c8a152fd3a0624'/>
<id>95e8f634d7a3ea5af40ec3fa42c8a152fd3a0624</id>
<content type='text'>
    
    In the FPU emulator code of the MIPS, the Cause bits of the FCSR register
    are not currently writeable by the ctc1 instruction.  In odd corner cases,
    this can cause problems.  For example, a case existed where a divide-by-zero
    exception was generated by the FPU, and the signal handler attempted to
    restore the FPU registers to their state before the exception occurred.  In
    this particular setup, writing the old value to the FCSR register would
    cause another divide-by-zero exception to occur immediately.  The solution
    is to change the ctc1 instruction emulator code to allow the Cause bits of
    the FCSR register to be writeable.  This is the behaviour of the hardware
    that the code is emulating.
    
    This problem was found by Shane McDonald, but the credit for the fix goes
    to Kevin Kissell.  In Kevin's words:
    
    I submit that the bug is indeed in that ctc_op:  case of the emulator.  The
    Cause bits (17:12) are supposed to be writable by that instruction, but the
    CTC1 emulation won't let them be updated by the instruction.  I think that
    actually if you just completely removed lines 387-388 [...] things would
    work a good deal better.  At least, it would be a more accurate emulation of
    the architecturally defined FPU.  If I wanted to be really, really pedantic
    (which I sometimes do), I'd also protect the reserved bits that aren't
    necessarily writable.
    
    Signed-off-by: Shane McDonald &lt;mcdonald.shane@gmail.com&gt;
    To: anemo@mba.ocn.ne.jp
    To: kevink@paralogos.com
    To: sshtylyov@mvista.com
    Patchwork: http://patchwork.linux-mips.org/patch/1205/
    Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
    
    In the FPU emulator code of the MIPS, the Cause bits of the FCSR register
    are not currently writeable by the ctc1 instruction.  In odd corner cases,
    this can cause problems.  For example, a case existed where a divide-by-zero
    exception was generated by the FPU, and the signal handler attempted to
    restore the FPU registers to their state before the exception occurred.  In
    this particular setup, writing the old value to the FCSR register would
    cause another divide-by-zero exception to occur immediately.  The solution
    is to change the ctc1 instruction emulator code to allow the Cause bits of
    the FCSR register to be writeable.  This is the behaviour of the hardware
    that the code is emulating.
    
    This problem was found by Shane McDonald, but the credit for the fix goes
    to Kevin Kissell.  In Kevin's words:
    
    I submit that the bug is indeed in that ctc_op:  case of the emulator.  The
    Cause bits (17:12) are supposed to be writable by that instruction, but the
    CTC1 emulation won't let them be updated by the instruction.  I think that
    actually if you just completely removed lines 387-388 [...] things would
    work a good deal better.  At least, it would be a more accurate emulation of
    the architecturally defined FPU.  If I wanted to be really, really pedantic
    (which I sometimes do), I'd also protect the reserved bits that aren't
    necessarily writable.
    
    Signed-off-by: Shane McDonald &lt;mcdonald.shane@gmail.com&gt;
    To: anemo@mba.ocn.ne.jp
    To: kevink@paralogos.com
    To: sshtylyov@mvista.com
    Patchwork: http://patchwork.linux-mips.org/patch/1205/
    Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Loongson 2F: Fix of problems introduced by -mfix-loongson2f-jump</title>
<updated>2010-04-30T19:52:58+00:00</updated>
<author>
<name>Wu Zhangjin</name>
<email>wuzhangjin@gmail.com</email>
</author>
<published>2010-04-10T12:07:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=64fc74f5f6055e8470208a7d9cfc8d3994fff34d'/>
<id>64fc74f5f6055e8470208a7d9cfc8d3994fff34d</id>
<content type='text'>
The -mfix-loongson2f-jump option provided by latest CVS binutils have fixed
the out-of-order issue of Loongson-2F described in chapter 15 of the
Loongson2F User Manual [1, 2], but introduced some problems.

The option changes all of the jump target to "addr &amp; 0xcfffffff" through the
at($1) register, but for the reboot address of Loongson 2F 0xbfc00000 this is
wrong.  Avoids the problem via telling the assembler to not use the $at
register.

[1] Loongson2F User Manual (Chinese Version)
    http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
    http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Reported-and-tested-by: Liu Shiwei &lt;liushiwei@gmail.com&gt;
Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: linux-mips &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1109/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The -mfix-loongson2f-jump option provided by latest CVS binutils have fixed
the out-of-order issue of Loongson-2F described in chapter 15 of the
Loongson2F User Manual [1, 2], but introduced some problems.

The option changes all of the jump target to "addr &amp; 0xcfffffff" through the
at($1) register, but for the reboot address of Loongson 2F 0xbfc00000 this is
wrong.  Avoids the problem via telling the assembler to not use the $at
register.

[1] Loongson2F User Manual (Chinese Version)
    http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
    http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Reported-and-tested-by: Liu Shiwei &lt;liushiwei@gmail.com&gt;
Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: linux-mips &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1109/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Loongson-2F: Use CONFIG_CPU_JUMP_WORKAROUNDS to control workarounds.</title>
<updated>2010-04-30T19:52:58+00:00</updated>
<author>
<name>Wu Zhangjin</name>
<email>wuzhangjin@gmail.com</email>
</author>
<published>2010-04-10T12:07:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b197b6286650feb9c991826519065aac6f4399b1'/>
<id>b197b6286650feb9c991826519065aac6f4399b1</id>
<content type='text'>
Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: linux-mips &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1106/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: linux-mips &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1106/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Loongson 2F: Enable fixups of the latest binutils</title>
<updated>2010-04-30T19:52:56+00:00</updated>
<author>
<name>Wu Zhangjin</name>
<email>wuzhangjin@gmail.com</email>
</author>
<published>2010-04-10T12:05:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8bbda428e90a2b638428fbb07abd80b9cb624a27'/>
<id>8bbda428e90a2b638428fbb07abd80b9cb624a27</id>
<content type='text'>
With the  "Fixups of Loongson2F" patch [1] having been applied to binutils
for binutils 2.20.1 we now can use it's time to enable the options provided
by the patch to compile the kernel.

Without these fixups, the system may hang if the erratum is triggered.

For more information on these fixups please refer to the following
references.

[1] "Fixups of Loongson2F" patch for binutils(actually for gas)
    http://sourceware.org/ml/binutils/2009-11/msg00387.html
[2] Chapter 15 of "Loongson2F User Manual"(Chinese Version)
    http://www.loongson.cn/uploadfile/file/200808211
[3] Chapter 15 of the English version Loongson 2F User Manual
    http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Signed-off-by: Zhang Le &lt;r0bertz@gentoo.org&gt;
Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: Zhang Le &lt;r0bertz@gentoo.org&gt;
Cc: linux-mips &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1106/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With the  "Fixups of Loongson2F" patch [1] having been applied to binutils
for binutils 2.20.1 we now can use it's time to enable the options provided
by the patch to compile the kernel.

Without these fixups, the system may hang if the erratum is triggered.

For more information on these fixups please refer to the following
references.

[1] "Fixups of Loongson2F" patch for binutils(actually for gas)
    http://sourceware.org/ml/binutils/2009-11/msg00387.html
[2] Chapter 15 of "Loongson2F User Manual"(Chinese Version)
    http://www.loongson.cn/uploadfile/file/200808211
[3] Chapter 15 of the English version Loongson 2F User Manual
    http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Signed-off-by: Zhang Le &lt;r0bertz@gentoo.org&gt;
Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: Zhang Le &lt;r0bertz@gentoo.org&gt;
Cc: linux-mips &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1106/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Loongson: Add CPU_LOONGSON2F_WORKAROUNDS</title>
<updated>2010-04-30T19:52:56+00:00</updated>
<author>
<name>Wu Zhangjin</name>
<email>wuzhangjin@gmail.com</email>
</author>
<published>2010-04-10T12:04:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=622844bf0b4cfa4f76d4a0ddc44266938385f5ab'/>
<id>622844bf0b4cfa4f76d4a0ddc44266938385f5ab</id>
<content type='text'>
As documented in the  Loongson 2F User Manual [2, 3], the old Loongson2F
series (2F01 / 2F02) have the NOP &amp; JUMP issues which requires workarounds
in the kernel and binutils.  This issue has been rectified in Loongson 2F
series 2F03 so no workarounds needed.

Now that the workarounds [1] adding the the -mfix-loongson2f-nop and
-mfix-loongson2f-jump options have been comitted to the binutils the CVS
repository), we can add the workarounds in the kernel.

The workarounds have no significant side effect on the system but may
decrease performance so we control them through a a new
CPU_LOONGSON2F_WORKAROUNDS config option allowing the users to only enable
it as necessary.

[1] "Fixups of Loongson2F" patch for binutils(actually for gas)
    http://sourceware.org/ml/binutils/2009-11/msg00387.html
[2] Chapter 15 of "Loongson2F User Manual"(Chinese Version)
    http://www.loongson.cn/uploadfile/file/200808211
[3] English Version of the above chapter 15
    http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: linux-mips &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1105/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As documented in the  Loongson 2F User Manual [2, 3], the old Loongson2F
series (2F01 / 2F02) have the NOP &amp; JUMP issues which requires workarounds
in the kernel and binutils.  This issue has been rectified in Loongson 2F
series 2F03 so no workarounds needed.

Now that the workarounds [1] adding the the -mfix-loongson2f-nop and
-mfix-loongson2f-jump options have been comitted to the binutils the CVS
repository), we can add the workarounds in the kernel.

The workarounds have no significant side effect on the system but may
decrease performance so we control them through a a new
CPU_LOONGSON2F_WORKAROUNDS config option allowing the users to only enable
it as necessary.

[1] "Fixups of Loongson2F" patch for binutils(actually for gas)
    http://sourceware.org/ml/binutils/2009-11/msg00387.html
[2] Chapter 15 of "Loongson2F User Manual"(Chinese Version)
    http://www.loongson.cn/uploadfile/file/200808211
[3] English Version of the above chapter 15
    http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: linux-mips &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1105/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Kconfig: Make Broadcom SoC support naming consistent</title>
<updated>2010-04-30T19:52:55+00:00</updated>
<author>
<name>Florian Fainelli</name>
<email>ffainelli@freebox.fr</email>
</author>
<published>2010-03-25T10:42:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c619366e36aa75beaaee630f3d6e468422ed9530'/>
<id>c619366e36aa75beaaee630f3d6e468422ed9530</id>
<content type='text'>
Signed-off-by: Florian Fainelli &lt;ffainelli@freebox.fr&gt;
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1082/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Florian Fainelli &lt;ffainelli@freebox.fr&gt;
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1082/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: BCM63xx: Update defconfig</title>
<updated>2010-04-30T19:52:55+00:00</updated>
<author>
<name>Florian Fainelli</name>
<email>ffainelli@freebox.fr</email>
</author>
<published>2010-03-25T10:42:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a9af5a01cadc25a058ee1dfd3bd8abd8724a3ed8'/>
<id>a9af5a01cadc25a058ee1dfd3bd8abd8724a3ed8</id>
<content type='text'>
the defconfig was out-of-sync since 2.6.30-rc6, update it with the new
symbols and enable BCM6338, 6345, wireless, b43 driver and LEDs support.

Signed-off-by:  Fainelli &lt;ffainelli@freebox.fr&gt;
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1081/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
the defconfig was out-of-sync since 2.6.30-rc6, update it with the new
symbols and enable BCM6338, 6345, wireless, b43 driver and LEDs support.

Signed-off-by:  Fainelli &lt;ffainelli@freebox.fr&gt;
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1081/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: oprofile: Fix breakage when CONFIG_OPROFILE=m</title>
<updated>2010-04-30T19:52:54+00:00</updated>
<author>
<name>Wu Zhangjin</name>
<email>wuzhangjin@gmail.com</email>
</author>
<published>2010-04-26T12:01:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=922010ff7b75737e6dc361f8eae9c2784ac1872d'/>
<id>922010ff7b75737e6dc361f8eae9c2784ac1872d</id>
<content type='text'>
When the oprofile is compiled as a module do_IRQ() is not called in
arch/mips/loongson/lemote-2f/irq.c due to a wrong #ifdef there.

Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1143/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When the oprofile is compiled as a module do_IRQ() is not called in
arch/mips/loongson/lemote-2f/irq.c due to a wrong #ifdef there.

Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1143/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
