linux-toradex.git/arch/openrisc/include/asm/bitops, branch v4.15 Linux kernel for Apalis and Colibri modules openrisc: add atomic bitops 2017-02-24T19:12:38+00:00 Stefan Kristiansson stefan.kristiansson@saunalahti.fi 2014-05-12T11:08:26+00:00 0e9f9fd20ce931cc2cf0519c56ae33fc74d656ad This utilize the load-link/store-conditional l.lwa and l.swa instructions to implement the atomic bitops. When those instructions are not available emulation is provided. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by Alan Cox https://lkml.org/lkml/2014/7/23/666, implement test_and_change_bit] Signed-off-by: Stafford Horne <shorne@gmail.com> 
This utilize the load-link/store-conditional l.lwa and l.swa
instructions to implement the atomic bitops.
When those instructions are not available emulation is provided.

Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
[shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by
Alan Cox https://lkml.org/lkml/2014/7/23/666, implement
test_and_change_bit]
Signed-off-by: Stafford Horne <shorne@gmail.com>
OpenRISC: Headers 2011-07-22T16:46:39+00:00 Jonas Bonn jonas@southpole.se 2011-06-04T19:43:49+00:00 58e0166a4772aaeb10c9b0f6d59f19099d2047df Signed-off-by: Jonas Bonn <jonas@southpole.se> Reviewed-by: Arnd Bergmann <arnd@arndb.de> 
Signed-off-by: Jonas Bonn <jonas@southpole.se>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>