linux-toradex.git/arch/parisc, branch v3.4.18

parisc: Add missing RCU idle APIs on idle loop

2012-10-12T20:38:53+00:00

commit fbe752188d5589e7fcbb8e79824e560f77dccc92 upstream.

In the old times, the whole idle task was considered
as an RCU quiescent state. But as RCU became more and
more successful overtime, some RCU read side critical
section have been added even in the code of some
architectures idle tasks, for tracing for example.

So nowadays, rcu_idle_enter() and rcu_idle_exit() must
be called by the architecture to tell RCU about the part
in the idle loop that doesn't make use of rcu read side
critical sections, typically the part that puts the CPU
in low power mode.

This is necessary for RCU to find the quiescent states in
idle in order to complete grace periods.

Add this missing pair of calls in the parisc's idle loop.

Reported-by: Paul E. McKenney 
Signed-off-by: Frederic Weisbecker 
Cc: James E.J. Bottomley 
Cc: Helge Deller 
Cc: Parisc 
Signed-off-by: Paul E. McKenney 
Reviewed-by: Josh Triplett 
Signed-off-by: Greg Kroah-Hartman

PARISC: Redefine ATOMIC_INIT and ATOMIC64_INIT to drop the casts

2012-09-14T17:00:33+00:00

commit bba3d8c3b3c0f2123be5bc687d1cddc13437c923 upstream.

The following build error occured during a parisc build with
swap-over-NFS patches applied.

net/core/sock.c:274:36: error: initializer element is not constant
net/core/sock.c:274:36: error: (near initialization for 'memalloc_socks')
net/core/sock.c:274:36: error: initializer element is not constant

Dave Anglin says:
> Here is the line in sock.i:
>
> struct static_key memalloc_socks = ((struct static_key) { .enabled =
> ((atomic_t) { (0) }) });

The above line contains two compound literals.  It also uses a designated
initializer to initialize the field enabled.  A compound literal is not a
constant expression.

The location of the above statement isn't fully clear, but if a compound
literal occurs outside the body of a function, the initializer list must
consist of constant expressions.

Reported-by: Fengguang Wu 
Signed-off-by: Mel Gorman 
Signed-off-by: James Bottomley 
Signed-off-by: Greg Kroah-Hartman

PARISC: fix TLB fault path on PA2.0 narrow systems

2012-06-09T15:36:07+00:00

commit 2f649c1f6f0fef445ce79a19b79e5ce8fe9d7f19 upstream.

commit 5e185581d7c46ddd33cd9c01106d1fc86efb9376
Author: James Bottomley 

    [PARISC] fix PA1.1 oops on boot

Didn't quite fix the crash on boot.  It moved it from PA1.1 processors to
PA2.0 narrow kernels.  The final fix is to make sure the [id]tlb_miss_20 paths
also work.  Even on narrow systems, these paths require using the wide
instructions becuase the tlb insertion format is wide.  Fix this by
conditioning the dep[wd],z on whether we're being called from _11 or _20[w]
paths.

Tested-by: Helge Deller 
Signed-off-by: James Bottomley 
Signed-off-by: Greg Kroah-Hartman

PARISC: fix boot failure on 32-bit systems caused by branch stubs placed before .text

2012-06-09T15:36:07+00:00

commit ed5fb2471b7060767957fb964eb1aaec71533ab1 upstream.

In certain configurations, the resulting kernel becomes too large to boot
because the linker places the long branch stubs for the merged .text section
at the very start of the image.  As a result, the initial transfer of control
jumps to an unexpected location.  Fix this by placing the head text in a
separate section so the stubs for .text are not at the start of the image.

Signed-off-by: John David Anglin 
Signed-off-by: James Bottomley 
Signed-off-by: Greg Kroah-Hartman

[PARISC] fix panic on prefetch(NULL) on PA7300LC

2012-05-16T12:15:21+00:00

Due to an errata, the PA7300LC generates a TLB miss interruption even on the
prefetch instruction.  This means that prefetch(NULL), which is supposed to be
a nop on linux actually generates a NULL deref fault.  Fix this by testing the
address of prefetch against NULL before doing the prefetch.

Cc: stable@vger.kernel.org
Signed-off-by: James Bottomley

[PARISC] fix crash in flush_icache_page_asm on PA1.1

2012-05-16T12:15:06+00:00

As pointed out by serveral people, PA1.1 only has a type 26 instruction
meaning that the space register must be explicitly encoded.  Not giving an
explicit space means that the compiler uses the type 24 version which is PA2.0
only resulting in an illegal instruction crash.

This regression was caused by

    commit f311847c2fcebd81912e2f0caf8a461dec28db41
    Author: James Bottomley 
    Date:   Wed Dec 22 10:22:11 2010 -0600

        parisc: flush pages through tmpalias space

Reported-by: Helge Deller 
Signed-off-by: John David Anglin 
Cc: stable@vger.kernel.org	#2.6.39+
Signed-off-by: James Bottomley

[PARISC] fix PA1.1 oops on boot

2012-05-16T10:14:45+00:00

All PA1.1 systems have been oopsing on boot since

commit f311847c2fcebd81912e2f0caf8a461dec28db41
Author: James Bottomley 
Date:   Wed Dec 22 10:22:11 2010 -0600

    parisc: flush pages through tmpalias space

because a PA2.0 instruction was accidentally introduced into the PA1.1 TLB
insertion interruption path when it was consolidated with the do_alias macro.
Fix the do_alias macro only to use PA2.0 instructions if compiled for 64 bit.
Cc: stable@vger.kernel.org  #2.6.39+
Signed-off-by: James Bottomley

parisc/CPU hotplug: Add missing call to notify_cpu_starting()

2012-05-16T01:16:57+00:00

The scheduler depends on receiving the CPU_STARTING notification, without
which we end up into a lot of trouble. So add the missing call to
notify_cpu_starting() in the bringup code.

Signed-off-by: Srivatsa S. Bhat 
Acked-and-Tested-by: Mikulas Patocka 
Acked-and-Tested-by: Tobias Ulmer 
Tested-by: John David Anglin 
Signed-off-by: Linus Torvalds

parisc: move definition of PAGE0 to asm/page.h

2012-05-10T22:12:08+00:00

This was defined in asm/pdc.h which needs to include asm/page.h for
__PAGE_OFFSET. This leads to an include loop so that page.h eventually will
include pdc.h again. While this is no problem because of header guards, it is
a problem because some symbols may be undefined. Such an error is this:

In file included from include/linux/bitops.h:35:0,
                 from include/asm-generic/getorder.h:7,
                 from arch/parisc/include/asm/page.h:162,
                 from arch/parisc/include/asm/pdc.h:346,
                 from arch/parisc/include/asm/processor.h:16,
                 from arch/parisc/include/asm/spinlock.h:6,
                 from arch/parisc/include/asm/atomic.h:20,
                 from include/linux/atomic.h:4,
                 from include/linux/sysfs.h:20,
                 from include/linux/kobject.h:21,
                 from include/linux/device.h:17,
                 from include/linux/eisa.h:5,
                 from arch/parisc/kernel/pci.c:11:
arch/parisc/include/asm/bitops.h: In function ‘set_bit’:
arch/parisc/include/asm/bitops.h:82:2: error: implicit declaration of function ‘_atomic_spin_lock_irqsave’ [-Werror=implicit-function-declaration]
arch/parisc/include/asm/bitops.h:84:2: error: implicit declaration of function ‘_atomic_spin_unlock_irqrestore’ [-Werror=implicit-function-declaration]

Signed-off-by: Rolf Eike Beer 
Signed-off-by: Linus Torvalds

parisc: add missing include of asm/page.h to asm/pgtable.h

2012-05-10T22:12:08+00:00

Fixes these errors:

In file included from arch/parisc/include/asm/io.h:5:0,
                 from include/linux/io.h:22,
                 from include/linux/pci.h:54,
                 from arch/parisc/kernel/setup.c:35:
arch/parisc/include/asm/pgtable.h:92:6: warning: "PAGE_SHIFT" is not defined [-Wundef]
arch/parisc/include/asm/pgtable.h:92:6: warning: "PAGE_SHIFT" is not defined [-Wundef]
arch/parisc/include/asm/pgtable.h:92:6: warning: "BITS_PER_PTE_ENTRY" is not defined [-Wundef]

Signed-off-by: Rolf Eike Beer 
Signed-off-by: Linus Torvalds